$120,000 - $160,000 USD yearly
Originally posted 3 November 2026 by the employer.
About the role
Ambarella is seeking a Verification Engineer to develop and execute verification solutions for SoCs used in video, image processing, computer vision, and AI applications. This role focuses on verifying components including image processing pipelines, video input subsystems, compression engines, and neural network processors.
What you'll do
- Develop and maintain verification testbenches using SystemVerilog, UVM, Verilog, C/C++, and Python.
- Create and execute verification plans for DSP blocks, control logic, processor cores, and specialized accelerators.
- Verify components of Ambarella's image processing pipeline, video input subsystem, compression engines, and neural network processors.
- Develop directed and constrained-random tests, assertions, checkers, and coverage models.
- Debug RTL and testbench failures, analyze simulation results, and resolve coverage gaps.
- Develop Python scripts and utilities to automate verification and regression tasks, including agentic AI verification workflows.
What you'll need
- Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Understanding of digital logic design and computer architecture.
- Hands-on experience with Verilog/SystemVerilog and simulation-based verification.
- Familiarity with UVM, constrained-random testing, and functional coverage.
- Programming skills in Python and/or C/C++.
Skills: SystemVerilog, UVM, simulation, coverage, testbench
More semiconductor jobs: Ambarella jobs · Verification engineer jobs
First seen in our index 10 days ago, well below the 59-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1412
|
Median days since first seen
59 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Ambarella | All employers we track in this specialty (1412 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 1412 |
| Open roles in the wider Digital Design & Verification family | 12 | 3617 · 122 employers |
| Median days since first seen | 65 d | 59 d (−6 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: SystemVerilog, UVM, simulation, coverage, testbench
Who's hiring in this category
- Qualcomm · 138 open roles · median 52 d
- NVIDIA · 109 open roles · median 74 d
- Apple · 107 open roles · median 17 d
- Synopsys · 90 open roles · median 53 d
- AMD · 81 open roles · median 65 d
- SiFive · 57 open roles · median 72 d
How we counted: 1412 open Design Verification (Design Verification) roles from 101 employers tracked in the SemiconductorJobs index, counted 14 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.