$129,400 - $207,000 USD yearly
Originally posted 11 November 2026 by the employer.
About the role
This position is responsible for IP and subsystem verification within Broadcom's custom silicon division, covering processor subsystems and other IPs for custom AI ASIC products.
What you'll do
- Architect verification environments and reusable testbenches for block and subsystem levels.
- Define block and subsystem-level test plans and drive verification closure.
- Perform CDC checks, formal verification, functional coverage closure, gate-level debug, and utilize emulation tools.
- Verify processor subsystems and execute verification across processor microarchitectures and bus protocols.
- Debug and resolve complex issues across RTL designs and testbenches under schedule pressure.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Science, or related field with 12+ years of SoC/ASIC verification experience, or Master's degree with 10+ years of experience.
- Hands-on, in-depth knowledge of UVM, SystemVerilog, and RTL design and verification.
- Experience architecting verification environments, testbenches, and defining block and subsystem-level test plans.
- Hands-on experience with CDC checks, formal verification, functional coverage, gate-level debug, and emulation tools.
- Experience in processor subsystem verification and knowledge of processor microarchitectures and bus protocols.
Nice to have
- Experience in creating and managing an automated verification environment.
Skills: UVM, SystemVerilog, RTL verification, testbenches, ASIC
More semiconductor jobs: Broadcom jobs · Verification engineer jobs
First seen in our index 0 days ago, well below the 61-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1353
|
Median days since first seen
61 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (1353 roles · 98 employers) |
|---|---|---|
| Open roles in this specialty | 24 | 1353 |
| Open roles in the wider Digital Design & Verification family | 84 | 3520 · 120 employers |
| Median days since first seen | 29 d | 61 d (+32 d vs this employer) |
| Median salary (USD postings) | n/a | $185k |
Skills observed across this category: UVM, SystemVerilog, RTL verification, testbenches, ASIC
Who's hiring in this category
- Qualcomm · 118 open roles · median 53 d
- Apple · 112 open roles · median 14 d
- NVIDIA · 105 open roles · median 75 d
- AMD · 84 open roles · median 71 d
- Synopsys · 74 open roles · median 55 d
- SiFive · 57 open roles · median 69 d
How we counted: 1353 open Design Verification (Design Verification) roles from 98 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.