Validate datacenter CPU high-speed IO interfaces including UCIe, UALink, PCIe Gen5/6+, and CXL.
About the role
This role is part of the datacenter CPU post silicon validation team, focusing on high-speed IO including inter-die interface UCIe, UALink, PCI Express, Compute Express Link (CXL), and multi-socket interfaces.
What you'll do
- Develop and execute feature enablement and validation test plans for SoC- and system-level features across AMD Server products for high-speed IO.
- Develop test content for focus testing, system-level stress testing of the IO domain, and cross-product stress testing.
- Develop post-silicon validation infrastructure encompassing software, hardware, automation environments, and lab setup.
- Debug and drive root-cause analysis for SoC-related issues across interactions between various SoC features.
- Collaborate with cross-functional teams to develop tools and improve post-silicon validation test strategy, methodology, and processes.
- Lead internal task forces and workgroups, and participate in industry consortia.
What you'll need
- Bachelors or Masters Degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.
- Experience with high-speed IO interfaces such as UCIe, UALink, PCIe Gen5/6+, CXL, or proprietary inter-die and multi-socket server interfaces in electrical, functional, or both domains.
- Experience in post-silicon bring up, silicon debug, and developing validation methodologies and test infrastructure.
- Debug skills at both the SoC and system level, along with board- and platform-level debug experience.
- Familiarity with programming and scripting languages including C/C++, Python, or Perl.
- Experience operating common lab equipment, including protocol analyzers, logic analyzers, and oscilloscopes.
Nice to have
- Proven leadership experience in SoC design or validation.
- Understanding of modern x86 microprocessor architecture and server platform architecture.
- Working knowledge of server operating systems including Linux and Windows.
More semiconductor jobs: AMD jobs · Post-silicon validation jobs · Texas jobs
First seen in our index 0 days ago, well below the 68-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
133
|
Median days since first seen
68 d
|
Category median salary (all employers)
$194k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (133 roles · 35 employers) |
|---|---|---|
| Open roles in this specialty | 18 | 133 |
| Open roles in the wider Silicon Validation & Test family | 151 | 2432 · 121 employers |
| Median days since first seen | 59 d | 68 d (+9 d vs this employer) |
| Median salary (USD postings) | n/a | $194k |
Who's hiring in this category
- Qualcomm · 19 open roles · median 55 d
- AMD (this employer) · 18 open roles · median 81 d
- NVIDIA · 16 open roles · median 91 d
- Arm Holdings · 8 open roles · median 15 d
- Graphcore · 7 open roles · median 148 d
- Micron Technology · 6 open roles · median 220 d
How we counted: 133 open Post-Silicon Validation (Design Verification) roles from 35 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Silicon Validation & Test family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.