Originally posted 8 October 2026 by the employer.
About the role
This role involves leading verification strategy, architecture, and execution across RTL, AMS, and Transistor-Level Verification domains.
What you'll do
- Lead verification strategy, architecture, and execution across RTL, AMS, and Transistor-Level Verification domains.
- Define and implement verification methodologies, test plans, coverage strategies, and debug flows.
- Develop, maintain, and enhance verification environments using SystemVerilog, UVM, SPICE/HSPICE, FineSim, and Verilog.
- Perform root-cause analysis and debugging across digital, mixed-signal, and transistor-level designs.
- Drive verification closure through functional, code, assertion, and mixed-signal coverage analysis.
- Evaluate, develop, and deploy tools, automation frameworks, and AI-assisted solutions to improve verification efficiency.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 10+ years of experience in semiconductor verification with expertise in RTL verification, AMS verification, transistor-level verification, memory, SoC, or advanced CMOS products.
- Strong programming and scripting skills (Python preferred) with experience in automation, data analysis, and EDA workflow optimization.
- Strong knowledge of CMOS design fundamentals, semiconductor device behavior, circuit analysis, and mixed-signal architectures.
Skills: verification strategy, RTL, AMS, Transistor-Level Verification, SystemVerilog, UVM
This role has been open 2 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1183
|
Median days open
64 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (1183 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 47 | 1183 |
| Open roles in the wider Digital Design & Verification family | 103 | 3165 · 114 employers |
| Median days open | 89 d | 64 d (+25 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: verification strategy, RTL, AMS, Transistor-Level Verification, SystemVerilog, UVM
Who's hiring in this category
- Qualcomm · 105 open roles · median 44 d
- AMD · 102 open roles · median 51 d
- NVIDIA · 73 open roles · median 65 d
- Synopsys · 61 open roles · median 27 d
- SiFive · 54 open roles · median 68 d
- Cadence Design Systems · 51 open roles · median 110 d
How we counted: 1183 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.