Senior Manager - Silicon Debug and Validation - Cupertino, United States
Originally posted 8 October 2026 by the employer.
Lead a team responsible for bringup and validation of debug features for Apple SOCs.
About the role
This role involves managing a team responsible for the bringup and validation of debug features and tools, triage of failures combining software, hardware, and Si expertise, and Si validation and characterization leveraging internal software builds for Apple SOCs.
What you'll do
- Manage a team responsible for bringup and validation of debug features and tools. - Triage failures requiring software, hardware, and Si expertise. - Conduct Si validation and characterization using internal software builds. - Make debug features and tools available for Apple R&D teams. - Debug critical issues sourced from SiVal, Factory, and Software testing, characterization, and screening. - Lead cross-functional issues while directing and prioritizing team work.
What you'll need
- BS degree with a minimum of 15 years of relevant industry experience. - Experience managing teams of 20+ engineers.
Nice to have
- Demonstrated proficiency in HW/SW interaction, Validation at scale, and characterization. - Demonstrated proficiency in automation frameworks. - Experience in FPGA- and Prototype HW-based Validation and Debug. - Demonstrated ability to grow and develop managers and senior technical contributors. - Strong scripting and data analysis experience. - Ability to present plans, status and issues to executive leadership.
Skills: Silicon Debug, Validation, Bringup, Characterization, HW/SW interaction
This role has been open 2 days — well below the 40-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
397
|
Median days open
40 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (397 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 397 |
| Open roles in the wider Silicon Validation & Test family | 12 | 2195 · 111 employers |
| Median days open | 3 d | 40 d (−37 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: Silicon Debug, Validation, Bringup, Characterization, HW/SW interaction
Who's hiring in this category
- AMD · 55 open roles · median 43 d
- Micron Technology · 40 open roles · median 33 d
- Qualcomm · 34 open roles · median 28 d
- NVIDIA · 24 open roles · median 21 d
- Graphcore · 21 open roles · median 116 d
- Microchip Technology · 20 open roles · median 68 d
How we counted: 397 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 11 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.