Validation Engineer - Tempe, AZ, United States
Originally posted 18 September 2026 by the employer — open 1 day.
About the role
This Validation Engineer role involves extensive bench testing and data collection to ensure integrated circuits meet performance and functionality targets. You will work on timing products including synthesizers, buffers, analog and digital PLLs.
What you'll do
- Automate lab data collection and data analysis using Python
- Work on schematic design of high-speed signal PCB
- Debug and analyze failures in devices
- Develop and document bench testing platforms for device validation and characterization
- Elaborate validation plans and execute validation tasks
- Analyze bench data and prepare reports summarizing device performance
What you'll need
- Master’s degree or foreign equivalent in Electrical Engineering, Electronic Engineering, or a related technical field
- 3 years of experience in a related field
- Hands-on experience with Serial communication protocols (I2C, SPI, RS232, UART, USB, CAN)
- Hands-on experience with design tools for schematic and layout of mixed-signal PCB, preferably Allegro
- Hands-on experience with PCB signal integrity simulation tools, preferably Hyperlynx and Ansys
- Hands-on experience with PLLs and timing devices including synthesizers and buffers
- 1 year of regular use of Python
- Knowledge of lab automation using LabVIEW and/or Python
- 1 year of experience in bench hardware set up and debugging
Nice to have
- Good communication skills (written and verbal)
- Problem solver
- Ability to work in teams and collaborate effectively
- Hands-on attitude in a lab environment
- Positive attitude and motivation to learn new skills
- High level of self-motivation and drive to make an impact
This role has been open 1 day — well below the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
408
|
Median days open
24 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | SiTime | All employers we track in this specialty (408 roles · 68 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 408 |
| Open roles in the wider Silicon Validation & Test family | 36 | 2024 · 111 employers |
| Median days open | 23 d | 24 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 50 open roles · median 2 d
- Infineon Technologies · 37 open roles · median 29 d
- Renesas Electronics · 33 open roles · median 30 d
- Micron Technology · 26 open roles · median 22 d
- Qualcomm · 24 open roles · median 18 d
- AMD · 19 open roles · median 26 d
How we counted: 408 open Silicon Test Engineering (DFT Test) roles from 68 employers tracked in the SemiconductorJobs index, counted 20 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.