Originally posted 10 November 2026 by the employer.
About the role
As a member of the physical design methodology team, you will define timing, power, and clocking methodologies across high-performance cores, graphics, and machine intelligence chips. Work spans low-power APUs to supercomputing platforms.
What you'll do
- Drive PVT corners and frequency targets while evaluating product performance modes and guard bands.
- Drive IP physical implementation recipes from synthesis through place and route (P&R) to optimize performance per watt across library, flow, and design environments.
- Partner on RTL architecture and physical design co-development to identify and resolve performance and power bottlenecks.
- Drive budgeting, measurement, analysis, and tracking of power consumption.
- Establish best practices for global and local clock distribution methodologies, balancing skew, power, and jitter trade-offs.
- Create guidelines for clocking, timing, and power sign-off methodologies.
What you'll need
- Mastery of logic, circuit design, and CAD tools for high-performance design.
- Hands-on background in physical design methodology and implementation from synthesis through routing.
- Degree in Electrical Engineering (MS or PhD preferred) or equivalent practical experience.
Nice to have
- Design experience in sub-micron processes.
- Familiarity with CPU or GPU architecture.
- Hands-on experience with power-analysis and measurement tools such as PrimePower or PowerArtist.
- Experience with high-performance clocking architectures and distribution.
- STA methodologies for timing closure, OCV, and advanced statistical margining techniques.
- Proficiency in scripting languages such as Perl, Tcl, or Python.
Skills: STA, timing closure, PrimePower, clock distribution, synthesis, P&R
More semiconductor jobs: AMD jobs · Physical design jobs · Texas jobs
First seen in our index 0 days ago, well below the 61-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
713
|
Median days since first seen
61 d
|
Category median salary (all employers)
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (713 roles · 87 employers) |
|---|---|---|
| Open roles in this specialty | 64 | 713 |
| Open roles in the wider Physical Implementation family | 91 | 1615 · 117 employers |
| Median days since first seen | 42 d | 61 d (+19 d vs this employer) |
| Median salary (USD postings) | n/a | $187k |
Skills observed across this category: STA, timing closure, PrimePower, clock distribution, synthesis, P&R
Who's hiring in this category
- Qualcomm · 104 open roles · median 61 d
- AMD (this employer) · 62 open roles · median 42 d
- Broadcom · 47 open roles · median 21 d
- NVIDIA · 46 open roles · median 81 d
- Synopsys · 43 open roles · median 40 d
- Intel Corporation · 32 open roles · median 32 d
How we counted: 713 open Physical Design (Physical Design) roles from 87 employers tracked in the SemiconductorJobs index, counted 10 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Physical Implementation family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.