Test Engineering Intern - Greensboro, NC, United States
$31 USD hourly
Originally posted 20 August 2026 by the employer.
About the role
This role is for a Test Engineering Intern within Qorvo's Advanced Cellular, Connectivity & Sensors, and High Performance Analog business groups.
What you'll do
- Create automated test software using C++ or C# to control test equipment and execute test plans.
- Support RF fixture and/or probe card design activities, including PCB design and layout, test socket design, and interface cabling design.
- Measure product using test equipment like DC source/measure units, spectrum analyzers, network analyzers, signal generators, and digital pattern generators.
- Process, verify, and analyze measured data, producing presentations and reports.
- Document test system and software designs.
- Develop test solutions for over temperature bench and ATE testing utilizing custom Loadboards/Lego Cards and Test Fixtures.
- Develop product interface fixtures using Altium Designer and Keysight ADS.
What you'll need
- Currently pursuing a BS, MS, or PhD in Electrical Engineering, Computer Engineering, or Computer Science.
- Minimum GPA of 3.0.
- Analog/RF circuit design coursework and/or experience.
- Knowledge of programming languages such as VB.NET, C#, or other object-oriented language.
- Proficiency with Microsoft Office (Excel, Word, PowerPoint).
This role has been open 29 days — slightly above the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
481
|
Median days open
24 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (481 roles · 72 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 481 |
| Open roles in the wider Silicon Validation & Test family | 36 | 2181 · 111 employers |
| Median days open | 28 d | 24 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 54 open roles · median 11 d
- Infineon Technologies · 37 open roles · median 33 d
- Renesas Electronics · 33 open roles · median 29 d
- AMD · 27 open roles · median 26 d
- Qualcomm · 26 open roles · median 14 d
- Micron Technology · 25 open roles · median 29 d
How we counted: 481 open Silicon Test Engineering (DFT Test) roles from 72 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.