Test Engineering Intern - Richardson, TX, United States
$31 USD hourly
Originally posted 31 August 2026 by the employer.
About the role
This role involves supporting test engineering activities for packaged semiconductor devices in Qorvo's Connect & Sensor, High Performance Analog, and Advanced Cellular business groups.
What you'll do
- Develop or modify automated test software for package RF test systems using LabVIEW, C#, Python, C++, or similar languages.
- Automate instrument control for VNAs, signal generators, power sensors, SMUs, spectrum analyzers, oscilloscopes, and digital interfaces.
- Develop with RF test hardware, including load boards, test fixtures, test sockets, contactors, interface cabling, and RF signal lineups.
- Measure packaged semiconductor devices and analyze RF, DC, and digital control results such as S-parameters, gain, phase, noise figure, compression, linearity, current, and power consumption.
- Process, verify, and summarize measured data using Excel, Python, JMP, Spotfire, MATLAB, or similar tools.
- Troubleshoot measurement issues, setup problems, calibration failures, socket or contactor issues, and unexpected yield trends.
What you'll need
- Currently pursuing BS, or MS in Electrical Engineering or Computer Science.
- 3.0 GPA or higher.
- Analog/RF circuit design coursework.
- Knowledge of programming languages such as VB.NET, C# or other object-oriented language.
- Proficiency with Microsoft Office (Excel, Word, PowerPoint).
This role has been open 28 days — slightly above the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
481
|
Median days open
24 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | QORVO | All employers we track in this specialty (481 roles · 72 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 481 |
| Open roles in the wider Silicon Validation & Test family | 36 | 2181 · 111 employers |
| Median days open | 28 d | 24 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 54 open roles · median 11 d
- Infineon Technologies · 37 open roles · median 33 d
- Renesas Electronics · 33 open roles · median 29 d
- AMD · 27 open roles · median 26 d
- Qualcomm · 26 open roles · median 14 d
- Micron Technology · 25 open roles · median 29 d
How we counted: 481 open Silicon Test Engineering (DFT Test) roles from 72 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.