Technical Staff Engineer - Design - AZ - Chandler, United States
Originally posted 14 June 2026 by the employer.
About the role
This role drives chiplet-based architecture definition and advanced-node product research for microcontroller platforms within the MCU Business Unit.
What you'll do
- Define chiplet-based architectures for edge AI microcontroller platforms, covering chiplet boundaries, die-to-die interfaces, power domains, and integration strategies. - Collaborate with analog business units and cross-functional teams on packaging requirements, die-to-die interface specifications, and integration roadmaps. - Perform architectural trade-off analysis across power, performance, area, and cost using modeling, simulation, and benchmarking. - Conduct advanced-node product research, process feasibility studies, and technology definition for edge AI workloads. - Develop and optimize advanced-node design flows for synthesis, placement, routing, timing closure, and verification alongside EDA vendors and CAD teams. - Work cross-functionally with AI accelerator, CPU core, memory subsystem, embedded software, advanced packaging, and manufacturing teams.
What you'll need
- Bachelor's degree in Electrical or Computer Engineering (or similar degree). - Minimum of 10+ years of relevant experience with Verilog, SystemVerilog, and/or VHDL. - Experience with chiplet-based or modular architectures, die-to-die interconnect standards, and 2.5D integration techniques. - Hands-on experience with advanced-node FinFET technology nodes and associated design flows. - Proficiency with EDA tools for architecture exploration, RTL design, synthesis, and physical implementation. - Experience using scripting languages (Python, Tcl, Perl) for design automation.
Nice to have
- Master's degree in Electrical or Computer Engineering. - Experience working with cross-business-unit teams on shared IP, chiplet definitions, or platform architectures. - Background in edge AI acceleration, digital signal processors, or embedded machine learning inference engines. - Track record in high-volume, cost-sensitive MCU product development from architecture definition through production. - Familiarity with silicon bring-up, validation, debug, and production lifecycle support activities. - Knowledge of UCIe (Universal Chiplet Interconnect Express) or other chiplet interface standards. - Experience with advanced nodes (7nm-class and beyond) and roadmap planning.
Skills: chiplet, architecture definition, advanced-node, microcontrollers, Edge AI
This role has been open 123 days — well above the 77-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
473
|
Median days open
77 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Microchip Technology | All employers we track in this specialty (473 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 473 |
| Open roles in the wider Digital Design & Verification family | 67 | 3322 · 115 employers |
| Median days open | 123 d | 77 d (+46 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: chiplet, architecture definition, advanced-node, microcontrollers, Edge AI
Who's hiring in this category
- Qualcomm · 79 open roles · median 86 d
- NVIDIA · 53 open roles · median 72 d
- Apple · 37 open roles · median 15 d
- AMD · 35 open roles · median 72 d
- Arm Holdings · 27 open roles · median 120 d
- Micron Technology · 21 open roles · median 99 d
How we counted: 473 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.