Technical Segment Product Management Manager - Memory Test Division
$223,300 - $357,400 USD yearly
Originally posted 2 November 2026 by the employer.
About the role
This role is responsible for leading a defined product or technology segment in memory test, owning strategy, execution, and results across the full product lifecycle.
What you'll do
- Define and execute segment-level strategy and multi-year business plans for assigned memory test products or technologies.
- Drive multi-generation product roadmaps in partnership with R&D, aligned to customer and market requirements.
- Own full product lifecycle management including positioning, definition, pricing, forecasting, launch, sustainment, and end-of-life.
- Lead go-to-market execution, including competitive analysis and technical marketing collateral development.
- Support strategic design-in and customer engagements, including roadmap reviews and executive presentations.
- Mentor and guide junior product managers, providing technical leadership and strategic direction.
What you'll need
- Bachelor’s degree in Electrical Engineering or a related technical field.
- 8–12+ years of experience in product management, product marketing, or technical marketing in the semiconductor memory industry.
- Strong understanding of semiconductor memory products, customers, and market dynamics.
- Demonstrated ability to lead complex initiatives in a matrixed organization.
- Ability to travel approximately 20%.
Nice to have
- Advanced degree (MS or MBA).
- Experience with memory ATE, test solutions, or complex semiconductor systems.
More semiconductor jobs: Teradyne jobs · Test engineer jobs · San Jose jobs
This role has been open 0 days — well below the 39-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
609
|
Median days open
39 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Teradyne | All employers we track in this specialty (609 roles · 81 employers) |
|---|---|---|
| Open roles in this specialty | 87 | 609 |
| Open roles in the wider Silicon Validation & Test family | 102 | 2323 · 111 employers |
| Median days open | 32 d | 39 d (−7 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne (this employer) · 86 open roles · median 32 d
- Renesas Electronics · 47 open roles · median 31 d
- Infineon Technologies · 45 open roles · median 38 d
- Qualcomm · 29 open roles · median 45 d
- Micron Technology · 28 open roles · median 49 d
- Texas Instruments · 28 open roles · median 40 d
How we counted: 609 open Silicon Test Engineering (DFT Test) roles from 81 employers tracked in the SemiconductorJobs index, counted 2 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.