System Engineering Intern - Newport Beach, CA, United States
Originally posted 27 October 2026 by the employer.
About the role
As a System Engineering Intern, you will work with experienced engineers to analyze, simulate, and validate high-speed channels, interconnects, PCBs, and packages.
What you'll do
- Support signal integrity investigations through modeling, simulation, and laboratory measurements using test equipment. - Analyze S-parameter data and evaluate high-speed channel performance. - Troubleshoot signal quality issues across interconnects, PCBs, and packages. - Collaborate with hardware, PCB, and product development teams to ensure reliable performance.
What you'll need
- Currently pursuing a Master's degree or PhD in Electrical Engineering, Physics, or a related field. - Completed coursework in electromagnetics, transmission lines, or high-speed digital design. - Analytical skills for troubleshooting signal quality and evaluating high-speed channels.
Nice to have
- Experience with SI simulation tools such as HFSS. - Experience with VNAs. - Experience with Python-based data analysis.
Skills: signal integrity, S-parameter, HFSS, interconnects, channel simulation
This role has been open 0 days — well below the 70-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
251
|
Median days open
70 d
|
Median salary
$196k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | MACOM | All employers we track in this specialty (251 roles · 47 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 251 |
| Open roles in the wider Analog & Mixed-Signal family | 39 | 1540 · 108 employers |
| Median days open | 0 d | 70 d (−70 d vs this employer) |
| Median salary (USD postings) | — | $196k |
Skills observed across this category: signal integrity, S-parameter, HFSS, interconnects, channel simulation
Who's hiring in this category
- Synopsys · 34 open roles · median 37 d
- AMD · 28 open roles · median 46 d
- Cadence Design Systems · 21 open roles · median 141 d
- Qualcomm · 21 open roles · median 70 d
- Micron Technology · 13 open roles · median 42 d
- Apple · 12 open roles · median 26 d
How we counted: 251 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 47 employers tracked in the SemiconductorJobs index, counted 28 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.