Originally posted 9 November 2026 by the employer.
About the role
The Sustaining Product Test Engineer improves the speed, cost, and reliability of high-volume production test for mixed-signal products. You will own post-release production test, managing test time reduction, tester ports, probe cards, load boards, and hardware preparation for offshore manufacturing.
What you'll do
- Drive test time reduction (TTR) to increase throughput and lower the cost of test.
- Own ATE tester ports or provide final technical sign-off on ports prepared by offshore teams.
- Check out probe cards, PIBs, and load boards from manufacturing and prepare them for offshore production.
- Improve or redesign ATE hardware to increase site count, reduce test time, and improve testability.
- Investigate production yield, correlation, and hardware issues through root-cause analysis at the bench and on the tester.
- Collect characterization data, support qualification across silicon revisions, and partner with design, product, and quality engineering teams to resolve production issues and customer returns.
What you'll need
- Bachelor’s degree in Electrical or Computer Engineering and 4–10 years of relevant experience.
- Hands-on hardware debugging skills, including the ability to read schematics and use bench instruments.
- Understanding of ATE hardware, including probe cards, load boards, relays, connectors, and signal paths.
- Experience with high-volume production test, including hardware release and yield improvement.
- Understanding of circuit blocks such as ADCs, DACs, PLLs, amplifiers, charge pumps, and temperature sensors.
- Familiarity with digital protocols including I2C, SPI, I2S, and TDM, along with data and yield analysis tools such as JMP and Excel.
Nice to have
- Experience with Teradyne UltraFlex or UltraFlexPLUS platforms.
- Demonstrated results in test time reduction, site-count increases, or tester-port development.
- Experience with ATE board schematic design and PCB layout review.
- Experience with Python or similar scripting languages for test automation and data analysis.
- Familiarity with OTP, flash, and other non-volatile memory testing.
More semiconductor jobs: Cirrus Logic jobs · Test engineer jobs · Austin jobs
This role has been open 0 days — well below the 40-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
639
|
Median days open
40 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Cirrus Logic | All employers we track in this specialty (639 roles · 86 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 639 |
| Open roles in the wider Silicon Validation & Test family | 22 | 2405 · 121 employers |
| Median days open | 35 d | 40 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 83 open roles · median 38 d
- Infineon Technologies · 51 open roles · median 35 d
- Renesas Electronics · 45 open roles · median 34 d
- Texas Instruments · 33 open roles · median 45 d
- Qualcomm · 29 open roles · median 52 d
- Micron Technology · 25 open roles · median 56 d
How we counted: 639 open Silicon Test Engineering (DFT Test) roles from 86 employers tracked in the SemiconductorJobs index, counted 9 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.