Bring complex mixed-signal ICs from first silicon to production release across audio CODECs, power delivery, and sensing architectures.
About the role
Cirrus Logic is seeking a Senior Silicon Validation & Characterization Engineer to take a hands-on role bringing complex mixed-signal ICs from first silicon to production release. The technical scope covers lab validation, automation, and silicon debug for audio CODECs, amplifiers, haptics, sensing, power delivery, and battery management.
What you'll do
- Perform hands-on silicon validation and characterization from first silicon through production release, contributing to test plans and coverage for analog, digital, and mixed-signal blocks.
- Build and improve automated lab setups and test software using Python, PXI systems, and bench top lab instrumentation.
- Design validation boards, review schematics and layouts, and measure performance, margins, robustness, and corner conditions.
- Partner across engineering teams to debug silicon issues, identify root causes, and connect validation results to production test limits and guard bands.
- Strengthen validation methods, documentation, and lab efficiency while presenting findings and providing technical guidance to junior engineers.
What you'll need
- Bachelor's degree in Electrical or Computer Engineering, with 5+ years of relevant industry experience.
- Hands-on experience with silicon validation, characterization, or post-silicon debug of mixed-signal ICs.
- Technical understanding of mixed-signal blocks such as ADCs, DACs, PLLs, amplifiers, regulators, and sensors.
- Experience developing automated test software, with Python preferred.
- Experience using lab instrumentation and familiarity with PXI-based systems.
Nice to have
- Experience validating audio or power-management ICs.
- Experience working with digital interfaces such as I2C, SPI, I2S, TDM, or SPMI.
- Experience using embedded firmware or lab-automation platforms.
- Experience correlating validation results with production test.
- Background providing technical leadership or mentoring junior engineers.
More semiconductor jobs: Cirrus Logic jobs · Test engineer jobs · Austin jobs
This role has been open 0 days — well below the 40-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
639
|
Median days open
40 d
|
Category median salary (all employers)
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Cirrus Logic | All employers we track in this specialty (639 roles · 86 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 639 |
| Open roles in the wider Silicon Validation & Test family | 22 | 2399 · 121 employers |
| Median days open | 35 d | 40 d (−5 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 83 open roles · median 38 d
- Infineon Technologies · 51 open roles · median 35 d
- Renesas Electronics · 45 open roles · median 34 d
- Texas Instruments · 33 open roles · median 45 d
- Qualcomm · 29 open roles · median 52 d
- Micron Technology · 25 open roles · median 56 d
How we counted: 639 open Silicon Test Engineering (DFT Test) roles from 86 employers tracked in the SemiconductorJobs index, counted 9 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.