Originally posted 17 September 2026 by the employer — open 0 days.
About the role
This role is responsible for the overall success of the Probes Test and Assembly operations, including safety, delivery, quality, and throughput. The Supervisor prioritizes and coordinates all manufacturing WIP management.
What you'll do
- Serve as the night shift safety champion and Emergency Response Team (ERT) member.
- Ensure quality execution and adherence to work instructions, monitoring for misprocessing and resolving audit findings.
- Own shift output performance by monitoring WIP, dispatching resources, balancing the line, and adjusting staffing.
- Directly supervise hourly employees, including work assignment, timekeeping, and progressive discipline.
- Lead daily shift huddles focused on safety, staffing, priorities, and output goals.
- Provide timely feedback, coaching, and recognition, supporting cross-training and skill development.
What you'll need
- Minimum 3 years of related experience.
- Experience in a microelectronic precision manufacturing cleanroom environment.
- Ability to work a night shift, including Wednesdays, Thursdays, Fridays, and every other Saturday from 5:00pm to 5:30am.
- Working knowledge of all Microsoft Office applications.
Nice to have
- Bachelor’s degree in engineering, manufacturing, or a related field.
- Experience in an electronics manufacturing environment.
- Experience in a management or leadership role with direct reports.
- Experience with SQL and/or Access databases.
- Experience with metrics and tracking on-time delivery and performance analysis.
- Strong knowledge of ERP and MRP systems, with QAD experience preferred.
This role has been open 0 days — well below the 27-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
341
|
Median days open
27 d
|
Median salary
$153k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | FormFactor | All employers we track in this specialty (341 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 341 |
| Open roles in the wider Silicon Validation & Test family | 14 | 1987 · 109 employers |
| Median days open | 18 d | 27 d (−9 d vs this employer) |
| Median salary (USD postings) | — | $153k |
Who's hiring in this category
- Infineon Technologies · 32 open roles · median 26 d
- Renesas Electronics · 32 open roles · median 29 d
- Qualcomm · 23 open roles · median 19 d
- Micron Technology · 22 open roles · median 17 d
- AMD · 18 open roles · median 25 d
- NVIDIA · 16 open roles · median 22 d
How we counted: 341 open Silicon Test Engineering (DFT Test) roles from 66 employers tracked in the SemiconductorJobs index, counted 17 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.