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Western Digital

Summer 2027 Intern - Hardware Engineering - San Jose, United States

Western Digital San Jose, United States Internship 3 months ago
Digital Design & SoC Architecture

Originally posted 31 July 2026 by the employer.

About the role

This internship supports early-career hiring needs for roles within ASIC Engineering, Hardware Development Engineering, Firmware Engineering, Systems Design & Integration Engineering, Mechanical Design Engineering, Equipment Engineering, and System-on-Chip (SoC) Engineering.

What you'll do

  • Design and verify ASIC architectures and digital logic
  • Build simulations and validate complex hardware designs
  • Support the ASIC development lifecycle through synthesis, place-and-route, and timing closure
  • Optimize performance, power, and reliability
  • Design and develop electronic hardware and magnetic recording systems
  • Create validation strategies and automated test solutions

What you'll need

  • Currently pursuing or recently completed a Bachelor’s, Master’s, or Ph.D. degree in Computer Science, Computer Engineering, Electrical Engineering, or a related engineering discipline
  • Experience developing technical skills through coursework, internships, co-ops, research, laboratory work, or personal projects in software development, embedded systems, firmware, ASIC/SoC design, or hardware development
  • Familiarity with engineering fundamentals and one or more relevant technical areas, including programming (C, C++, Python, Java, Go, SQL, JavaScript), digital logic, embedded systems, computer architecture, or electronics
  • Demonstrated analytical and problem-solving skills
  • Strong written and verbal communication skills
  • Interest in storage technologies, semiconductors, or embedded systems

Nice to have

  • Proficiency with Microsoft Office and common software development tools (such as Git, Linux, or IDEs)

Skills: ASIC Design, RTL, Verilog/SystemVerilog, Digital Logic, Verification

Market context

This role has been open 79 days — well above the 60-day median for Digital/RTL Design roles.

Digital/RTL Design · RTL Design

Open roles in category
1037
Median days open
60 d
Median salary
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Western Digital compares in Digital/RTL Design hiring
Metric Western Digital All employers we track in this specialty (1037 roles · 103 employers)
Open roles in this specialty 1 1037
Open roles in the wider Digital Design & Verification family 1 3201 · 115 employers
Median days open 79 d 60 d (+19 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: ASIC Design, RTL, Verilog/SystemVerilog, Digital Logic, Verification

Who's hiring in this category

  • Qualcomm · 140 open roles · median 64 d
  • Synopsys · 86 open roles · median 32 d
  • AMD · 71 open roles · median 38 d
  • Analog Devices · 47 open roles · median 50 d
  • NVIDIA · 44 open roles · median 60 d
  • NXP Semiconductors · 42 open roles · median 86 d

How we counted: 1037 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
San Jose, United States
On-site
Internship
3 months ago

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