Staff QA Engineer (DDR, CXL, PCIE) - Hyderabad, India
Originally posted 11 September 2026 by the employer — open 0 days.
About the role
This role involves quality assurance and validation for PCIe, CXL, and memory controller products within a management subsystem. You will focus on designing and implementing advanced automation frameworks and validating firmware.
What you'll do
- Add or modify test cases using Pytest and GTest frameworks.
- Write new unit/integration tests for Python and C/C++ modules.
- Perform basic debugging for failed tests and automation issues.
- Understand how automated tests run within a CI/CD pipeline.
- Collaborate across engineering teams to ensure robust, high-quality releases.
What you'll need
- BS/MS degree in Computer Science, Computer Engineering, or Electrical Engineering.
- 4-10 years of hands-on experience in QA/Validation for PCIe, CXL, Firmware, and understanding of DDR.
- Strong knowledge of PCIe, CXL, NVMe protocols, SSD architecture, and firmware testing.
- Proficiency in Python and C/C++.
- Experience with Pytest for Python and GTest for C/C++.
- Ability to create new tests from scratch in both Python and C/C++.
- Basic automation debugging and troubleshooting skills.
- Understanding of CI/CD workflows and integration of automated tests.
- Proficiency in Pytest, Robot Framework, and scripting.
- Experience with CI/CD pipelines (Jenkins, GitLab CI, GitHub Actions).
- Solid understanding of OOP concepts and software design principles.
- Experience setting up protocol analyzers, capturing traces, and analyzing traces.
- Excellent debugging skills and ability to analyze firmware logs.
Nice to have
- Experience with high-speed interconnects.
- Experience with storage benchmarking.
- Experience with advanced CI/CD integration.
- Understanding of management protocols MCTP, Redfish, NVMe-MI.
Skills: QA/Validation, PCIe, CXL, DDR, firmware testing, Pytest, CI/CD pipeline
This role has been open 0 days — well below the 57-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1125
|
Median days open
57 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (1125 roles · 91 employers) |
|---|---|---|
| Open roles in this specialty | 49 | 1125 |
| Open roles in the wider Digital Design & Verification family | 118 | 3053 · 116 employers |
| Median days open | 112 d | 57 d (+55 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: QA/Validation, PCIe, CXL, DDR, firmware testing, Pytest, CI/CD pipeline
Who's hiring in this category
- AMD · 100 open roles · median 28 d
- Qualcomm · 100 open roles · median 49 d
- NVIDIA · 93 open roles · median 62 d
- Micron Technology · 53 open roles · median 97 d
- Arm Holdings · 49 open roles · median 66 d
- Marvell Technology (this employer) · 48 open roles · median 116 d
How we counted: 1125 open Design Verification (Design Verification) roles from 91 employers tracked in the SemiconductorJobs index, counted 11 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.