Staff Memory Design Engineer, HBM - Richardson, TX, United States
Originally posted 23 September 2026 by the employer.
HBM
About the role
This role is responsible for designing, simulating, and optimizing DRAM circuits while supporting the development of digital and analog circuitry used in advanced memory products. This position drives innovation in future memory generations and contributes to silicon-to-system development.
What you'll do
- Design digital, analog, and memory core circuits using CMOS logic and transistors.
- Utilize AI-Enabled tools for schematic editing, data collection, and layout floorplan.
- Create optimized floorplans for circuit placement, routing, power delivery, sense margins, array timing, and die size.
- Conduct circuit simulations using FINESIM, HSPICE, and VERILOG; analyze power, performance, reliability, and parasitic impacts.
- Validate builds through reticle experiments, tape-out revisions, and simulation-to-silicon correlation.
- Prepare and maintain design documentation and contribute to departmental training.
What you'll need
- Coursework in CMOS Circuit Design, VLSI, and Analog Circuit Design.
- Understanding of device reliability and circuit floor planning.
- Proficiency with Cadence Virtuoso.
- Experience simulating with FINESIM, HSPICE, and VERILOG.
- Expertise in DRAM subsystem architecture, specification, operation, or design.
- BS or MS in Electrical Engineering or related field plus 6 years of experience in DRAM design, product, or system.
Nice to have
- Deep knowledge of industry-specific technologies and competitive trends.
Skills: DRAM subsystem architecture, CMOS logic, circuit simulations, layout floorplan, tape-out revisions
This role has been open 11 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DRAM subsystem architecture, CMOS logic, circuit simulations, layout floorplan, tape-out revisions
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.