Originally posted 5 June 2026 by the employer. Relisted by the employer on 11 August 2026.
Support NAND product.
About the role
This role involves understanding design constraints and implementing high-quality layouts, overseeing and managing the layout process including floor-planning, placement, and routing.
What you'll do
- Understand design constraints and implement high-quality layouts.
- Oversee and manage the layout process including floor-planning, placement, and routing.
- Deliver mid-size blocks, including signal and floorplan, in Core/Pitch and periphery area.
- Work with Design and other engineering groups to apply multiple layout techniques for the design and verification of Array, Digital and Analog circuits.
- Execute secondary layout tasks such as ECO, LCO, and DFM.
- Coordinate with TD, Design, CAD, and layout teams to deliver on schedule with quality.
What you'll need
- 7+ years of experience in layout.
- Proficiency using Cadence VXL on periphery blocks.
- Strong debug and problem-solving skills for LVS, DRC & Layout issues.
- Hands-on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier.
- Good understanding of Analog Layout fundamentals such as Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices.
- Good understanding of layout effects on the circuit such as Speed, Capacitance, Power, and Area.
- Good understanding of Design rules.
- Ability to debug problems, find effective solutions, and negotiate with engineering staff.
- Understanding of various circuit design protocols, different fab processes, mask generation techniques, and tape-out processes and procedures.
Skills: CMOS, Bandgap, LDOs, Charge Pumps, floor-planning, NAND
This role has been open 200 days — well above the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: CMOS, Bandgap, LDOs, Charge Pumps, floor-planning, NAND
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.