Staff IC Packaging Engineer - Mechanical Simulation

Originally posted 12 May 2026 by the employer.

About the role

The Staff IC Packaging Engineer leads the development and commercialization of advanced integrated circuit (IC) packaging technologies from concept through high-volume manufacturing (HVM). The position collaborates with Outsourced Semiconductor Assembly and Test (OSAT) partners, foundries, and material suppliers across architectures such as FCCSP, FCBGA, SiP/Modules, RDL-based packages, and 2.5D/3D integration.

What you'll do

- Lead the development and deployment of advanced packaging technologies including FCCSP, FCBGA, SiP/Modules, RDL-based packages, and 2.5D/3D integration. - Drive new product introduction (NPI) from concept through successful transfer into high-volume manufacturing. - Define and optimize package architectures, covering high-density interconnects, die-to-die (D2D) integration, and performance/reliability trade-offs. - Develop and establish process flows, material sets, Best Known Methods (BKM), and process control plans. - Design and execute Design of Experiments (DOE), test vehicles, and process characterization for technology development and qualification. - Collaborate with OSATs, foundries, substrate vendors, and material suppliers to align technology development with product requirements while applying FMEA, SPC/QC, reliability testing, and failure analysis.

What you'll need

- Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field with 4+ years of System/Package Design/Technology Engineering or related work experience; OR Master's degree with 3+ years; OR PhD with 2+ years. - Experience leading new product introduction (NPI) and technology transfers into high-volume manufacturing (HVM). - Technical proficiency in package architectures, including high-density interconnects, die-to-die (D2D) integration, and Design for Manufacturability (DFM). - Hands-on experience with Design of Experiments (DOE), process characterization, and establishing process flows and control plans. - Experience with FMEA, SPC/QC, reliability testing, and failure analysis in packaging environments.

Nice to have

- Advanced degree (M.S. or Ph.D.) in a relevant engineering discipline. - Expertise in Flip Chip (CSP/FCBGA), Wire Bond, System in Package (SiP), module integration, Redistribution Layer (RDL), wafer bonding, and 2.5D/3D packaging. - Familiarity with wafer-level processes, wafer-on-wafer bonding, dicing technologies, and laser groove technology. - Six Sigma Green or Black Belt certification. - Background in statistical data analysis and process optimization with OSATs and foundries.