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Samsung Semiconductor

Staff Engineer, SRAM Circuit Design - San Jose, California, United States

Samsung Semiconductor San Jose, California, United States 19 days ago
Digital Design & SoC Architecture

$163,000 - $253,000 USD yearly

Originally posted 16 September 2026 by the employer — open 1 day.

About the role

This role involves the end-to-end design of high-performance, low-power memory circuits. You will contribute to the power, performance, and area (PPA) efficiency of future computing, mobile, and and AI platforms.

What you'll do

  • Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes.
  • Optimize SRAM designs for performance, power and area (PPA) and yield.
  • Develop custom layouts and perform physical design verifications (e.g., DRC, LVS).
  • Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification.
  • Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance.
  • Mentor Junior engineers, providing guidance on SRAM design techniques and best practices.

What you'll need

  • 10+ years of industry experience in SRAM or memory circuit design with a Bachelor's degree in electrical engineering, or 8+ years with a Master's degree.
  • Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.).
  • Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths.
  • Familiarity with timing analysis, power analysis, and design for manufacturability (DFM).
  • Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso.
  • Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks.
  • Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond).
  • Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling).
  • Background in silicon debug and root-cause analysis.

Skills: SRAM circuit design, bit cells, sense amplifiers, decoders, advanced process nodes

Market context

This role has been open 1 day — well below the 64-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
288
Median days open
64 d
Median salary
$207k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Samsung Semiconductor compares in Memory Design hiring
Metric Samsung Semiconductor All employers we track in this specialty (288 roles · 32 employers)
Open roles in this specialty 2 288
Median days open 9 d 64 d (−55 d vs this employer)
Median salary (USD postings) — $207k

Skills observed across this category: SRAM circuit design, bit cells, sense amplifiers, decoders, advanced process nodes

Who's hiring in this category

  • Micron Technology · 140 open roles · median 100 d
  • Synopsys · 25 open roles · median 65 d
  • Broadcom · 20 open roles · median 39 d
  • SanDisk · 16 open roles · median 16 d
  • Qualcomm · 15 open roles · median 158 d
  • NVIDIA · 7 open roles · median 64 d

How we counted: 288 open Memory Design (Memory Design) roles from 32 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Samsung Semiconductor

Samsung Semiconductor

Apply now
San Jose, California, United States
On-site
$163,000 - $253,000 USD yearly
19 days ago

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