Staff Design Engineer, HBM - Richardson, TX, United States
Originally posted 15 August 2026 by the employer.
This role focuses on designing and optimizing High Bandwidth Memory (HBM) products.
About the role
This role involves working closely with cross-functional teams to analyze and resolve silicon issues across HBM products. The team focuses on designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems.
What you'll do
- Work on HBM product design and support sustaining design maintenance (ECOs/spec changes).
- Own end-to-end debug of silicon, system, and customer issues, driving root-cause analysis and resolution.
- Collaborate with Design Engineering (DE), Product Engineering (PE), Technology Development (TD), and system teams to execute issue resolution.
- Identify and debug yield, reliability, and performance issues to improve product quality.
- Support customer bring-up, qualification, and system-level debug activities.
- Contribute sustaining learnings to improve design quality, debug efficiency, and verification methodologies.
What you'll need
- 6+ years (BS) or 4+ years (MS) in Electrical Engineering, Computer Engineering, or related field.
- Strong understanding of DRAM/HBM architecture and high-speed memory interfaces.
- Experience in digital and/or custom design and verification.
- Hands-on experience in silicon debug or post-silicon validation.
- Ability to independently drive complex technical issues to closure.
- Proficiency in Artificial Intelligence (Claude Code or similar) in improving design quality and efficiency.
Nice to have
- Experience with HBM/DDR/LPDDR or high-speed IO systems.
- Background in system-level debug and silicon-to-system correlation.
- Knowledge of timing and margin analysis, signal and power integrity.
- Experience with DFT / mBIST / test-mode debug.
- Programming/scripting skills (Python preferred) for debug automation.
Skills: HBM product design, silicon debug, DRAM/HBM architecture, high-speed memory interfaces, post-silicon validation
This role has been open 51 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 287 |
| Median days open | 86 d | 69 d (+17 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM product design, silicon debug, DRAM/HBM architecture, high-speed memory interfaces, post-silicon validation
Who's hiring in this category
- Micron Technology (this employer) · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.