Staff Datapath Design Engineer - San Jose, CA, United States
$190,000 - $246,000 USD yearly
Originally posted 26 October 2026 by the employer.
About the role
Lead the design, analysis, and optimization of digital and analog circuits for new NAND memory products.
What you'll do
- Lead the design, analysis, and performance, power, and area (PPA) optimization of digital and analog circuits for NAND memory products. - Define architecture and chip plans, including placement and routing optimization. - Design high-speed datapath circuits at the block level, model parasitics, and supervise layout. - Perform circuit simulations using industry-standard simulators to validate functionality and performance. - Execute circuit reliability verification for aging, electromigration, and self-heating to ensure designs operate within safe operating ranges. - Contribute to memory, logic, and analog circuit design, layout, and STARRC extraction.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related field with 5 years of progressive post-baccalaureate experience. - Experience with high-speed circuit performance, power, and area (PPA) optimization. - Circuit simulation experience with SystemVerilog, HSPICE, or other SPICE simulators. - Silicon data analysis and circuit change capability. - Experience in circuit reliability verification for aging, electromigration, and self-heating. - Experience with layout review and STARRC extraction.
Skills: NAND, datapath, HSPICE, SystemVerilog, StarRC, PPA
This role has been open 0 days — well below the 70-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
309
|
Median days open
70 d
|
Median salary
$200k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (309 roles · 31 employers) |
|---|---|---|
| Open roles in this specialty | 157 | 309 |
| Median days open | 91 d | 70 d (+21 d vs this employer) |
| Median salary (USD postings) | — | $200k |
Skills observed across this category: NAND, datapath, HSPICE, SystemVerilog, StarRC, PPA
Who's hiring in this category
- Micron Technology (this employer) · 158 open roles · median 90 d
- Synopsys · 32 open roles · median 66 d
- Qualcomm · 19 open roles · median 87 d
- SanDisk · 17 open roles · median 53 d
- Broadcom · 16 open roles · median 67 d
- NVIDIA · 7 open roles · median 33 d
How we counted: 309 open Memory Design (Memory Design) roles from 31 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.