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AMD

SRAM Circuit Design Engineer - MA, Boxborough, United States

AMD Remote friendly (US, MA, Boxborough, United States) Full-time 1 month ago
Digital Design & SoC Architecture

Originally posted 4 September 2026 by the employer.

About the role

This role involves the design and optimization of high-performance SRAM and memory structures fundamental to modern CPU architectures.

What you'll do

  • Contribute to the physical design and implementation of high-speed SRAM and memory structures for advanced CPU products.
  • Collaborate with architecture, RTL, circuit design, and physical design teams to optimize power, performance, area, and schedule.
  • Perform floorplanning, placement, clock tree synthesis, routing, timing closure, and design optimization.
  • Analyze and resolve implementation, timing, power, and signoff challenges.
  • Support physical verification, extraction, reliability analysis, and design signoff activities.
  • Create technical presentations, design reviews, and documentation for engineering teams and management.

What you'll need

  • Experience with high-speed SRAM design, memory design, or memory-centric physical implementation.
  • Strong understanding of CPU, cache, or other performance-critical digital designs.
  • Strong understanding of computer architecture, hardware design concepts, and performance, power, and area tradeoffs.
  • Knowledge of chip-level floorplanning, bus and pin planning, clock tree synthesis, placement, optimization, routing, and timing closure.
  • Experience with parasitic extraction, static timing analysis, physical verification, and design signoff methodologies.
  • Familiarity with power integrity analysis, including IR-drop and electromigration.
  • Ability to comprehend complex Verilog RTL and make modifications to support timing, power, or implementation objectives.
  • Knowledge of digital circuits, including high-speed flops, synchronizers, level shifters, and SRAM.
  • Experience using industry-standard EDA tools for physical design and implementation.
  • Familiarity with Tcl, Perl, C, or Python.

Nice to have

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.

Skills: SRAM, memory structures, physical design, timing closure, CPU architectures

Market context

This role has been open 30 days — well below the 69-day median for Memory Design roles.

Memory Design · Memory Design

Open roles in category
287
Median days open
69 d
Median salary
$205k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How AMD compares in Memory Design hiring
Metric AMD All employers we track in this specialty (287 roles · 29 employers)
Open roles in this specialty 2 287
Median days open 113 d 69 d (+44 d vs this employer)
Median salary (USD postings) — $205k

Skills observed across this category: SRAM, memory structures, physical design, timing closure, CPU architectures

Who's hiring in this category

  • Micron Technology · 151 open roles · median 86 d
  • Synopsys · 27 open roles · median 49 d
  • SanDisk · 17 open roles · median 32 d
  • Broadcom · 16 open roles · median 50 d
  • Qualcomm · 12 open roles · median 149 d
  • NVIDIA · 7 open roles · median 59 d

How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.

Apply now
US, MA, Boxborough, United States
Hybrid
Full-time
1 month ago

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