Sr. Staff Engineer - Physical Design - Bengaluru, India
Originally posted 6 October 2026 by the employer.
About the role
This role involves driving the physical implementation of high-performance SoCs through the complete RTL-to-GDSII flow.
What you'll do
- Own and drive end-to-end physical design implementation, including floor planning, synthesis, placement, Clock Tree Synthesis (CTS), and routing.
- Fine-tune design for Power, Performance, and Area (PPA) targets using multi-voltage domains, power gating (UPF), and datapath optimization.
- Drive Static Timing Analysis (STA) across multiple corners and operating modes, resolving setup/hold violations, signal integrity issues, and clock domain crossing constraints.
- Execute Design Rule Checks (DRC), Layout Versus Schematic (LVS), electromigration/IR drop (EMIR) analysis, and Equivalence Checking (LEC/Formality).
- Collaborate with RTL (Frontend), DFT, and Signoff teams for optimal PPA.
- Automate flows and improve design methodologies using Tcl, Python, or Perl scripting.
What you'll need
- 10+ years of experience in Physical design implementation.
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Extensive experience in physical design PPA activities, including floorplanning, placement, clock tree synthesis, routing, and timing closure.
- Good understanding of EDA tools such as Fusion Compiler, Innovus, Primetime, Tempus, VCLP, LEC, Calibre, Red Hawk.
- Strong understanding of static timing analysis, power analysis, and signal integrity analysis.
Nice to have
- Experience in mentoring and coaching junior engineers.
Skills: RTL-to-GDSII, PPA optimization, timing closure, STA, DRC/LVS
This role has been open 0 days — well below the 60-day median for Physical Design roles.
Physical Design · Physical Design
|
Open roles in category
631
|
Median days open
60 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (631 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 631 |
| Open roles in the wider Physical Implementation family | 39 | 1430 · 108 employers |
| Median days open | 35 d | 60 d (−25 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: RTL-to-GDSII, PPA optimization, timing closure, STA, DRC/LVS
Who's hiring in this category
- Qualcomm · 122 open roles · median 38 d
- AMD · 49 open roles · median 21 d
- Broadcom · 40 open roles · median 85 d
- NVIDIA · 37 open roles · median 60 d
- Synopsys · 29 open roles · median 48 d
- Micron Technology · 25 open roles · median 75 d
How we counted: 631 open Physical Design (Physical Design) roles from 78 employers tracked in the SemiconductorJobs index, counted 6 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.