Analog Layout Automation Engineer - Haifa, Israel
Originally posted 5 October 2026 by the employer.
About the role
As an Analog Layout Automation Engineer, you will contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors. This role focuses on automation and leveraging AI/ML techniques for improved design and efficiency.
What you'll do
- Convert design concepts into silicon by collaborating with circuit designers and using advanced CAD tools.
- Review floor plans, analyze circuits, run verification suites, and resolve LVS/DRC/ERC issues.
- Drive automation by developing scripts and improving workflows.
- Apply AI/ML for layout optimization, verification acceleration, advanced modeling, and intelligent quality metrics.
- Implement data-driven design insights to reduce manual effort.
What you'll need
- BS degree in a technical discipline with a minimum of 10 years of relevant experience.
- Strong programming/scripting skills in SKILL, Perl, TCL, Shell, and/or Python.
- Demonstrated ability to automate layout tasks, flows, and quality checks using scripting and CAD tools.
- Proficiency in custom and standard-cell floor planning, hierarchical layout assembly, and physical integration.
- High proficiency in interpreting physical verification reports, including DRC, ERC, and LVS.
- Technical understanding of IR drop, RC delay, electromigration, self-heating, coupling capacitance, and related reliability concerns.
Nice to have
- Experience designing analog and mixed-signal layouts in deep-submicron CMOS and FinFET technologies.
- Solid understanding of supervised and self-supervised learning, convolutional neural networks (CNNs), core training concepts, loss functions, backpropagation, and optimization.
- Hands-on experience with PyTorch for model development and experimentation.
- Proven record in implementing high-quality analog layouts with tight device matching, low noise, and low power consumption.
- Familiarity with failure-prone circuit/layout structures, analog and DFM best practices, and ability to diagnose and resolve layout-related issues.
- Understanding of image processing fundamentals, spatial representations, multi-channel image handling, segmentation, and object detection concepts.
- Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and familiarity with Cadence Innovus.
- Experience with CAD automation workflows and PCell creation.
Skills: layout automation, SKILL, Perl, TCL, Python
This role has been open 0 days — well below the 84-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
692
|
Median days open
84 d
|
Median salary
$193k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (692 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 692 |
| Open roles in the wider Physical Implementation family | 34 | 1430 · 108 employers |
| Median days open | 6 d | 84 d (−78 d vs this employer) |
| Median salary (USD postings) | — | $193k |
Skills observed across this category: layout automation, SKILL, Perl, TCL, Python
Who's hiring in this category
- Cadence Design Systems · 165 open roles · median 167 d
- Synopsys · 52 open roles · median 35 d
- NVIDIA · 41 open roles · median 73 d
- Micron Technology · 40 open roles · median 114 d
- Qualcomm · 37 open roles · median 74 d
- GlobalFoundries · 28 open roles · median 51 d
How we counted: 692 open EDA/CAD Engineering (EDA Tools) roles from 76 employers tracked in the SemiconductorJobs index, counted 6 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.