Originally posted 2 September 2026 by the employer.
Focus on the Teralynx Switch Architecture Team.
About the role
You will contribute to the Teralynx product line, shaping switch products for cloud and AI data centers.
What you'll do
- Deliver detailed behavioral and performance models to validate architectural decisions.
- Drive end-to-end switch architecture from high-level concept through micro-architecture engagement and silicon bring-up.
- Partner with cross-functional engineering teams to ensure architectural intent is delivered.
- Analyze tradeoffs across latency, throughput, memory architecture, power, area, and QoS.
- Contribute to long-term architectural direction and roadmap planning for the Teralynx product line.
What you'll need
- Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or related field and 15+ years of relevant experience, OR Master’s/PhD with 10–12+ years of experience in semiconductor architecture or ASIC development.
- Strong background designing or architecting complex ASICs in networking or switch domains.
- Expertise with behavioral and performance modeling, architectural validation, and system-level tradeoff analysis.
- Strong programming skills in C/C++ and Python.
Nice to have
- Experience with multi-die / chiplet architectures, die-to-die interfaces, or advanced packaging.
- Familiarity with switch pipeline architectures, buffer management, traffic engineering, and programmable datapaths.
- Experience engaging with customers or standards bodies.
- Published papers, patents, or previous leadership roles in architecture teams.
Skills: Switch Architecture, Product architecture definition, Behavioral modeling, Performance modeling, micro-architecture
This role has been open 27 days — well below the 71-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
436
|
Median days open
71 d
|
Median salary
$238k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (436 roles · 64 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 436 |
| Open roles in the wider Digital Design & Verification family | 29 | 3113 · 115 employers |
| Median days open | 23 d | 71 d (−48 d vs this employer) |
| Median salary (USD postings) | — | $238k |
Skills observed across this category: Switch Architecture, Product architecture definition, Behavioral modeling, Performance modeling, micro-architecture
Who's hiring in this category
- Qualcomm · 73 open roles · median 76 d
- NVIDIA · 56 open roles · median 53 d
- AMD · 36 open roles · median 71 d
- Arm Holdings · 27 open roles · median 96 d
- NXP Semiconductors · 19 open roles · median 98 d
- Renesas Electronics · 17 open roles · median 98 d
How we counted: 436 open SoC/Chip Architecture (SOC Architecture) roles from 64 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.