Sr. Post-Silicon Systems Software Validation Engineer, Annapurna Labs - Austin, Texas, United States
Originally posted 16 September 2026 by the employer.
About the role
As a Senior Post-Silicon Systems Software Validation Engineer, you will lead critical validation aspects across the product development lifecycle for custom silicon. This role spans validation of the complete vertical stack, including silicon, PCB, high-speed components, inter-system connections, and system-to-system interfaces for Machine Learning accelerators.
What you'll do
- Lead and own critical validation aspects from early design validation through emulation, silicon bring-up, post-silicon validation, and ongoing support of production systems.
- Develop comprehensive validation strategies and lead new methodologies to improve validation coverage and time to root cause.
- Create detailed test plans covering functional, performance, power, and stress testing from silicon bring-up to product release.
- Execute complex test plans from RTL simulation and emulation environments through physical silicon validation.
- Perform complex debug, including hands-on silicon bring-up and debug in the lab using oscilloscopes, logic analyzers, and protocol analyzers.
- Build test infrastructure, CI/CD, and automated regression frameworks to enable efficient validation at scale.
What you'll need
- Strong programming skills (Python, Lua, C/C++, Rust, Go).
- Solid understanding of computer architecture and chip/system validation methodologies.
- Experience with cloud infrastructure and CI/CD.
- Firmware testing and/or development (BIOS, BMC, drivers).
- Domain expertise in PCIe, HBM, GPUs, neural networks, or ML HW architecture.
- Knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation (Palladium, Zebu, Veloce) through silicon failure analysis and debug.
This role has been open 27 days — well below the 62-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
112
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Amazon | All employers we track in this specialty (112 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 112 |
| Open roles in the wider Silicon Validation & Test family | 12 | 2211 · 111 employers |
| Median days open | 39 d | 62 d (−23 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 18 open roles · median 44 d
- AMD · 15 open roles · median 61 d
- NVIDIA · 14 open roles · median 68 d
- Graphcore · 10 open roles · median 119 d
- Amazon (this employer) · 6 open roles · median 38 d
- Micron Technology · 5 open roles · median 209 d
How we counted: 112 open Post-Silicon Validation (Design Verification) roles from 29 employers tracked in the SemiconductorJobs index, counted 14 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.