Originally posted 17 June 2026 by the employer. Relisted by the employer on 25 September 2026.
Focus on hardware development for data center AI acceleration markets using Broadcom or Cisco switch architectures.
About the role
As a Senior Platform Hardware Design Engineer, you will lead the development of system and board hardware from inception to full-volume production. This position focuses on product development for data center AI acceleration systems and requires experience with Broadcom or Cisco switches and board design.
What you'll do
- Lead cross-functional engineering teams responsible for system and hardware development of AI acceleration-based systems from product definition to production, including multilevel board physical design, DFM, power regulation, board bring-up qualification and debug, thermal, signal integrity, and EMI. - Work with SOC silicon architects and the business unit to define and develop product requirements, specifications, and cost targets. - Direct system architecture, system management, circuit implementations, and security down to component selections. - Define and manage validation and assist with hardware bring-up, troubleshooting, design verification, and optimizations at the board and system level. - Provide implementation guidelines and feedback to silicon, package, and system design groups, and author design technical documentation.
What you'll need
- Bachelor’s or Master's degree in Computer or Electrical Engineering. - Experience leading system and board hardware development from concept to full-volume production. - Experience with switches and their board design, specifically using Broadcom or Cisco switches. - Capability working with power supply designs, mechanical and thermal teams, firmware development and validation teams, and PCB layout engineers.
Nice to have
- Strong experience in Cadence tools, such as Concept Capture and Allegro PCB. - Solid experience in high-speed mixed-signal design techniques, as well as LDOs and Multiphase DC-DC switching power supply Power Integrity for high-power ASIC products, processors, or GPUs. - Understanding of industrial standards including high-speed/digital interfaces (USB, PCI Express), memory interface, I2C/SMBus/PMBus, SPI, and JTAG. - Experience with hardware lab tools, digital oscilloscopes, and common lab equipment. - Experience with scripting to assist with daily tasks (Python, BASH, Perl, etc). - Experience with switches, CPUs, FPGAs, and their board design including SI and PI knowledge.
Skills: platform hardware design, board design, power integrity, signal integrity, Cadence Allegro
This role has been open 128 days — well above the 55-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · SOC Architecture
|
Open roles in category
106
|
Median days open
55 d
|
Median salary
$206k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (106 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 29 | 106 |
| Open roles in the wider Software, Firmware & Systems family | 393 | 6298 · 144 employers |
| Median days open | 63 d | 55 d (+8 d vs this employer) |
| Median salary (USD postings) | — | $206k |
Skills observed across this category: platform hardware design, board design, power integrity, signal integrity, Cadence Allegro
Who's hiring in this category
- AMD (this employer) · 29 open roles · median 63 d
- Qualcomm · 22 open roles · median 51 d
- NVIDIA · 14 open roles · median 84 d
- Intel Corporation · 6 open roles · median 50 d
- Mobileye · 5 open roles · median 30 d
- Renesas Electronics · 4 open roles · median 2 d
How we counted: 106 open Hardware Systems Engineering (SOC Architecture) roles from 28 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.