Sr Manager Design Development Technical Leadership, HBM - Richardson, TX, United States
Originally posted 17 April 2026 by the employer.
Lead technical execution for High Bandwidth Memory builds across DRAM, base die, and interposers.
About the role
As the single-threaded technical program owner for HBM Build, you will coordinate cross-functional teams, manage technical dependencies and risks, and provide technical leadership across the HBM design lifecycle. The role operates within Micron’s Heterogeneous Integration Group (HIG) supporting High Bandwidth Memory (HBM) builds across DRAM, base die, test vehicles, and interposers.
What you'll do
- Lead end-to-end execution of HBM build achievements across DRAM, base die, test vehicles, interposers, IP, and sustaining development efforts. - Drive multi-functional alignment, manage dependencies, and maintain execution plans to achieve schedule, cost, and quality objectives. - Lead governance activities including design reviews, program reviews, risk management, and change control processes. - Partner with foundries, IP vendors, contractors, and procurement teams to resolve execution challenges and support design delivery. - Own roadmap communication, executive reporting, and collaborator alignment for HBM build programs.
What you'll need
- Bachelor’s degree in Electrical Engineering or a related field, or equivalent experience. - 10+ years of relevant semiconductor industry experience. - Strong understanding of custom and digital design flows and the full SoC or DRAM development lifecycle. - Experience leading large, cross-functional technical programs through influence, collaboration, and execution rigor. - Experience working with foundries, IP vendors, and external ecosystem partners.
Nice to have
- Knowledge of DRAM architecture and operation, preferably within the HBM product family. - Familiarity with industry standards and compliance requirements such as JEDEC. - Experience managing program budgets, IP investments, mask planning, and cost forecasting. - Experience with formal program or project management methodologies and tools. - Experience working with Agentic AI tools to assist with design and verification.
Skills: HBM design, DRAM, base die, test chips, JEDEC
This role has been open 184 days — well above the 51-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
177
|
Median days open
51 d
|
Median salary
$220k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (177 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 177 |
| Median days open | 126 d | 51 d (+75 d vs this employer) |
| Median salary (USD postings) | — | $220k |
Skills observed across this category: HBM design, DRAM, base die, test chips, JEDEC
Who's hiring in this category
- Qualcomm · 25 open roles · median 54 d
- AMD · 21 open roles · median 29 d
- NVIDIA · 20 open roles · median 40 d
- Synopsys · 15 open roles · median 44 d
- Arm Holdings · 10 open roles · median 91 d
- NXP Semiconductors · 7 open roles · median 34 d
How we counted: 177 open Technical Program Management (SOC Architecture) roles from 48 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.