Sr. Engineer, SoC Design Verification Engineer, System Management Controller - Boston, Massachusetts, United States
$100,000 - $500,000 USD yearly
Originally posted 26 August 2026 by the employer.
About the role
This role involves validating the System Management Controller (SMC) and enabling multi-chip integration within chiplet-based SoCs.
What you'll do
- Develop and maintain SMC tests and supporting DV infrastructure.
- Write, execute, and track test plans for chiplet and multi-chip SoC designs.
- Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT.
- Triage, analyze, and debug issues in collaboration with design and architecture teams.
What you'll need
- Proficiency in SystemVerilog, SV-UVM, Python, and C/C++.
- Experience in writing test plans, building infrastructure, and debugging hardware/software flows.
- Familiarity with AI-assisted tools like Copilot, Cursor, and Claude for verification.
- Comfortable working with remote mentorship and distributed teams.
Skills: SystemVerilog, SV-UVM, Python, C/C++, test plans, multi-chip SoC designs
This role has been open 39 days — well below the 61-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1191
|
Median days open
61 d
|
Median salary
$188k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Tenstorrent | All employers we track in this specialty (1191 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 13 | 1191 |
| Open roles in the wider Digital Design & Verification family | 31 | 3108 · 114 employers |
| Median days open | 128 d | 61 d (+67 d vs this employer) |
| Median salary (USD postings) | — | $188k |
Skills observed across this category: SystemVerilog, SV-UVM, Python, C/C++, test plans, multi-chip SoC designs
Who's hiring in this category
- AMD · 102 open roles · median 44 d
- Qualcomm · 98 open roles · median 47 d
- NVIDIA · 79 open roles · median 68 d
- Synopsys · 67 open roles · median 26 d
- SiFive · 56 open roles · median 57 d
- Cadence Design Systems · 52 open roles · median 116 d
How we counted: 1191 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 4 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.