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SiTime

Sr. Engineer, MEMS Assembly - Santa Clara, CA, United States

SiTime Santa Clara, CA, United States 7 months ago
Packaging & Advanced Integration

$138,800 - $190,850 USD yearly

Originally posted 14 April 2026 by the employer.

About the role

As a Sr. Engineer, MEMS Assembly, you will bring up and evolve MEMS packaging technologies for timing products.

What you'll do

- Manage and work with MEMS back-end assembly and packaging partners to develop, evolve, and troubleshoot MEMS wafer-level packaging technologies. - Evaluate the impact of assembly processes on device performance and reliability while ensuring high yield and quality. - Work with MEMS design and characterization teams to ensure products are designed for manufacturability (DFM) and validated. - Coordinate and perform failure analysis to characterize and debug assembly process impact on MEMS devices. - Define packaging technologies to enable timing products.

What you'll need

- MS or PhD in Mechanical Engineering, Electrical Engineering, Physics, or equivalent. - Minimum of 5 years of industrial experience. - Experience with MEMS assembly and packaging. - Understanding of MEMS design and the interactions between design, fabrication, and packaging. - Experience with reliability characterization and yield analysis.

Nice to have

- Experience in bringing MEMS products to production.

Skills: MEMS assembly, wafer-level packaging, device performance and reliability, DFM, failure analysis

Market context

This role has been open 194 days — well above the 60-day median for Packaging Engineering roles.

Packaging Engineering · Advanced Packaging

Open roles in category
300
Median days open
60 d
Median salary
$167k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How SiTime compares in Packaging Engineering hiring
Metric SiTime All employers we track in this specialty (300 roles · 59 employers)
Open roles in this specialty 4 300
Open roles in the wider Process, Fab & Equipment family 18 10037 · 107 employers
Median days open 51 d 60 d (−9 d vs this employer)
Median salary (USD postings) — $167k

Skills observed across this category: MEMS assembly, wafer-level packaging, device performance and reliability, DFM, failure analysis

Who's hiring in this category

  • KLA Corporation · 42 open roles · median 136 d
  • Micron Technology · 40 open roles · median 42 d
  • Renesas Electronics · 21 open roles · median 46 d
  • Intel Corporation · 20 open roles · median 28 d
  • GlobalFoundries · 14 open roles · median 68 d
  • Lumilens · 13 open roles · median 79 d

How we counted: 300 open Packaging Engineering (Advanced Packaging) roles from 59 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.

Apply now
Santa Clara, CA, United States
On-site
$138,800 - $190,850 USD yearly
7 months ago

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