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Intel Corporation

Sr Director, XSE Design Verification Engineering Manager

Intel Corporation Remote friendly (US, California, Santa Clara, United States) 1 day ago
Verification, Validation & Test

$256,050 - $361,480 USD yearly

Direct Xeon SoC design verification processes and delivery milestones in Santa Clara.

Originally posted 30 October 2026 by the employer.

About the role

As a Design Verification Engineering Manager, you will lead a team of design verification engineers responsible for Xeon SoC design verification. You will deploy and manage silicon design verification processes, procedures, verification tools, and technologies while collaborating with design, microarchitecture, and post-silicon validation teams.

What you'll do

  • Present the status of verification and design quality to senior executives, providing technical solutions when critical issues arise.
  • Collaborate with program leaders on verification delivery and regression metrics against project milestones.
  • Work with SoC security validation teams to integrate security-related testing, hackathon reviews, and validation techniques to meet security development lifecycle requirements.
  • Partner with design, microarchitecture, and post-silicon validation teams to identify design bugs and improve microarchitecture.
  • Direct team execution through goal setting, work facilitation, accountability, and technical performance management.

What you'll need

  • Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, or a related field.
  • 12+ years of experience in ASIC/SoC design and verification with a Bachelor's degree, 8+ years with a Master's degree, or 6+ years with a PhD.
  • Comprehensive knowledge of industry-standard protocols.

Nice to have

  • Proven experience in formal people management or leadership roles, with 5-10+ years in managing technical teams.
  • Familiarity with AI and GPU technologies.
  • Experience with hardware emulation platforms.

Skills: design verification, Xeon SoC, ASIC verification, emulation, testbench

More semiconductor jobs: Intel Corporation jobs · Verification engineer jobs · California jobs

Market context

This role has been open 0 days — well below the 58-day median for Design Verification roles.

Design Verification · Design Verification

Open roles in category
1269
Median days open
58 d
Category median salary (all employers)
$185k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How Intel Corporation compares in Design Verification hiring
Metric Intel Corporation All employers we track in this specialty (1269 roles · 96 employers)
Open roles in this specialty 42 1269
Open roles in the wider Digital Design & Verification family 102 3325 · 114 employers
Median days open 23 d 58 d (−35 d vs this employer)
Median salary (USD postings) — $185k

Skills observed across this category: design verification, Xeon SoC, ASIC verification, emulation, testbench

Who's hiring in this category

  • Qualcomm · 112 open roles · median 43 d
  • NVIDIA · 93 open roles · median 70 d
  • AMD · 91 open roles · median 59 d
  • Synopsys · 73 open roles · median 44 d
  • Apple · 70 open roles · median 9 d
  • SiFive · 56 open roles · median 83 d

How we counted: 1269 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 30 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.

Apply now
US, California, Santa Clara, United States
Hybrid
$256,050 - $361,480 USD yearly
1 day ago

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