Solution Architect, FPGA/SoC - AECG - CA, San Jose, United States
Originally posted 26 October 2026 by the employer.
Architect customer-focused solutions and define features for AECG FPGA and SoC product families using Vivado and Vitis tools.
About the role
The Solution Architect is part of AMD's Adaptive and Embedded Computing Group (AECG) Product, Software and Solutions team responsible for delivering customer-focused solutions for AECG platforms. The position partners across silicon planning, architecture, software, and marketing to define features for FPGA and SoC product families.
What you'll do
- Partner with silicon planning and architecture teams to help define features for FPGA and SoC product families. - Collaborate with market segment architects and business leads to create solutions for aerospace and defense, automotive, wired and wireless networks, test and measurement, medical, industrial, and vision markets. - Work closely with Vivado and Vitis Tools, IP, system software, and boards engineering and marketing teams to define and drive solution plan deliverables. - Prioritize and align solution deliverables with product marketing and engineering teams during release planning processes. - Present progress updates to executive leadership and deliver solution, silicon, and customer application presentations to internal marketing and engineering teams.
What you'll need
- BS or MS in Computer Science, Computer Engineering, or Electrical Engineering with significant relevant industry experience. - Experience as a System Architect, Application Engineer, or Technical Marketing Engineer/Manager with digital system experience. - Experience with interface protocols such as PCIe, (LP)DDR, MIPI, DisplayPort, HDMI, SDI, Ethernet, and JesD. - Experience with AECG (Xilinx) FPGA products and exposure to Vivado and Vitis design tools. - Understanding of application areas including wired communications, artificial intelligence, machine learning, autonomous driving, and DSP processing.
Nice to have
- Prior design experience with ASICs, FPGAs, RF design, or embedded software. - Project management experience.
This role has been open 0 days — well below the 66-day median for FPGA Design roles.
FPGA Design · RTL Design
|
Open roles in category
105
|
Median days open
66 d
|
Median salary
$162k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (105 roles · 25 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 105 |
| Median days open | 58 d | 66 d (−8 d vs this employer) |
| Median salary (USD postings) | — | $162k |
Who's hiring in this category
- Altera · 33 open roles · median 60 d
- AMD (this employer) · 11 open roles · median 63 d
- Teradyne · 9 open roles · median 78 d
- Qualcomm · 8 open roles · median 50 d
- Microchip Technology · 7 open roles · median 79 d
- Keysight Technologies · 6 open roles · median 8 d
How we counted: 105 open FPGA Design (RTL Design) roles from 25 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.