SoC Verification Lead
$232,000 - $368,000 USD yearly
Originally posted 30 October 2026 by the employer. Relisted by the employer on 31 October 2026.
About the role
NVIDIA is seeking an SoC Verification Engineer to serve as a Person-in-Charge (PIC) within the SoC Verification (SoCV) team. In this role, you will lead verification workstreams for AI-enabled SoC designs powering data centers, client computing, autonomous vehicles, and robotics.
What you'll do
- Own the SoC-level verification plan, schedule, and achievement tracking from project conception through tape-out as the primary PIC.
- Collaborate with architects, IP owners, emulation, FPGA, and infrastructure teams to align on coverage goals and resolve bottlenecks.
- Drive verification status reviews, track open issues across teams, and lead risk identification and mitigation planning.
- Partner with tape-out teams to define and close verification sign-off criteria at each tape-out milestone.
- Define and evolve SoC verification flows and methodologies to handle complex AI-enabled chip architectures.
What you'll need
- Bachelor’s degree or Master’s degree (or equivalent experience) in Electrical Engineering, Computer Engineering, or a related field.
- 15+ years of hands-on experience in ASIC/SoC functional verification.
- Deep understanding of SoC-level verification challenges and flows from block integration through full-chip simulation and tape-out sign-off.
- Proven ability to lead or coordinate verification efforts across multiple IPs and multi-functional teams globally.
- Proficiency in SystemVerilog and UVM-based testbench development.
- Familiarity with C/C++ for directed and hardware-controlled test development at the SoC level.
- Solid grasp of verification infrastructure, including EDA tool configuration, regression automation, and environment maintenance.
Skills: SoC-level verification, UVM, SystemVerilog, tape-out, functional verification
More semiconductor jobs: NVIDIA jobs · Verification engineer jobs · California jobs
This role has been open 142 days — well above the 57-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1276
|
Median days open
57 d
|
Category median salary (all employers)
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (1276 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 97 | 1276 |
| Open roles in the wider Digital Design & Verification family | 257 | 3354 · 114 employers |
| Median days open | 72 d | 57 d (+15 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SoC-level verification, UVM, SystemVerilog, tape-out, functional verification
Who's hiring in this category
- Qualcomm · 116 open roles · median 44 d
- NVIDIA (this employer) · 91 open roles · median 69 d
- AMD · 88 open roles · median 60 d
- Apple · 73 open roles · median 10 d
- Synopsys · 72 open roles · median 45 d
- SiFive · 59 open roles · median 58 d
How we counted: 1276 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 31 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.