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NVIDIA

Silicon Product Engineer – Manufacturing - CA, Santa Clara, United States

NVIDIA Remote friendly (US, CA, Santa Clara, United States) 1 day ago
Product Engineering & Quality

$116,000 - $218,500 USD yearly

Originally posted 28 October 2026 by the employer.

About the role

As a Silicon Product Engineer – Manufacturing in the Testability, Manufacturability, Reliability & Quality (TMRQ) team, you will validate and implement SLT/BLT production diagnostics and test specs for silicon features in a high-volume manufacturing environment. The role supports post-silicon validation, POR verification, and bring-up across GPU, SoC, and CPU silicon programs.

What you'll do

- Develop and implement closed-loop analysis for VF characteristics and POR expectations versus production screens to refine manufacturing screening diagnostics. - Support VF, VMIN, VMAX, and PVT spec validation and productization activities across manufacturing teams and product segments. - Partner with HW engineering teams—including Silicon PVT design, characterization, IO design, validation, and SLT/BLT Production Operations—to determine test coverage, constraints, and test conditions for high-volume manufacturing screens. - Support prototyping to adjust speed, power, circuits, yield, and quality for silicon coverage within the SLT socketed environment. - Coordinate, develop, and maintain SLT/BLT testing flows and support silicon correlation between production testing infrastructure and internal characterization programs. - Partner with software and platform teams to improve SLT testing infrastructure, debug knobs, and data collection features.

What you'll need

- Bachelor’s or Master’s degree in Microelectronics, Electrical, Electronic, or Computer Engineering, or equivalent experience. - 3+ years of relevant industry experience in post-silicon PVT validation or high-volume manufacturing testing for SoCs, GPUs, CPUs, or similar devices. - Hands-on lab experience with silicon bring-up, lab debug, shmoo analysis, VF characteristics, test content bring-up, and correlation to silicon characterization. - Knowledge of EE fundamentals, device physics, silicon design, statistics, STA concepts, fault analysis, sampling, and computer architecture. - Understanding of firmware/driver structures and their interaction with hardware. - Experience with Python, BASH, Linux, and scripting.

Nice to have

- Experience with GPUs, CPUs, AI accelerators, or large-scale SoCs in a high-volume manufacturing (HVM) environment. - Prior understanding of manufacturing test strategy for a major silicon product from early planning through ramp to production. - Experience supporting cross-functional alignment on production methodologies adopted across manufacturing teams.

Skills: SLT, BLT, PVT, Silicon bring-up, HVM, shmoo

Market context

This role has been open 0 days — well below the 66-day median for Product Engineering roles.

Product Engineering · Silicon Validation

Open roles in category
39
Median days open
66 d
Median salary
$184k
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
How NVIDIA compares in Product Engineering hiring
Metric NVIDIA All employers we track in this specialty (39 roles · 17 employers)
Open roles in this specialty 6 39
Open roles in the wider Silicon Validation & Test family 83 2312 · 114 employers
Median days open 35 d 66 d (−31 d vs this employer)
Median salary (USD postings) — $184k

Skills observed across this category: SLT, BLT, PVT, Silicon bring-up, HVM, shmoo

Who's hiring in this category

  • AMD · 8 open roles · median 69 d
  • NVIDIA (this employer) · 5 open roles · median 41 d
  • Microchip Technology · 4 open roles · median 98 d
  • Qualcomm · 4 open roles · median 65 d
  • onsemi · 3 open roles · median 140 d
  • Renesas Electronics · 2 open roles · median 22 d

How we counted: 39 open Product Engineering (Silicon Validation) roles from 17 employers tracked in the SemiconductorJobs index, counted 29 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
Hybrid
$116,000 - $218,500 USD yearly
1 day ago

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