Server SoC System Architect - San Diego, California, United States of America
$167,100 - $250,700 USD yearly
Originally posted 4 June 2026 by the employer.
About the role
This role involves architecting system and hardware infrastructure for data center SoCs, collaborating with platform architects to enable debug, telemetry, and manageability features while ensuring compliance with industry standards.
What you'll do
- Develop the SoC and system-level architecture for data center products focused on debug, telemetry, RAS, and server manageability capabilities. - Define architecture for crash dumping, error injection, invasive debug mechanisms, debugger authentication, elevation of privileges, and secure sessions. - Prepare and present technical documentation and reports for engineering teams, senior management, and customers. - Participate in standards organizations, monitor debug, telemetry, RAS, and manageability trends, and ensure the SoC infrastructure complies with regulatory standards and industry best practices.
What you'll need
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience (or Master's degree and 3+ years, or PhD and 2+ years). - Knowledge of SoC architecture for data center SoCs. - Understanding of HW/SW/System requirements for debug, telemetry, and manageability technologies.
Nice to have
- Over 5 years of experience in designing hardware for data center environments (or 8 years in hardware design for data centers). - At least 2 years of experience in architecting and developing technologies for data center products. - Proficiency in boot, reset, recovery, debug, telemetry, and server manageability concepts. - Experience with debug, telemetry, and RAS protocols (e.g., MIPI STP, DMTF PLDM). - Familiarity with security technologies for a data center SoC related to secure debug, attestation, HW & SW supply chain provenance, and access control/isolation primitives. - Familiarity with designing debug, telemetry, and RAS infrastructures for confidential computing. - Experience participating in or leading standards bodies or forums (e.g., OCP) and developing specifications. - Knowledge of data center architectures from edge computing to hyperscale, and understanding of the data center product life cycle. - Master's degree in Computer Science/Engineering, Electrical Engineering, or related field.
Skills: SoC architecture, data center, debug, telemetry, RAS, manageability
This role has been open 141 days — well above the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
473
|
Median days open
78 d
|
Median salary
$239k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (473 roles · 67 employers) |
|---|---|---|
| Open roles in this specialty | 80 | 473 |
| Open roles in the wider Digital Design & Verification family | 423 | 3322 · 115 employers |
| Median days open | 82 d | 78 d (+4 d vs this employer) |
| Median salary (USD postings) | — | $239k |
Skills observed across this category: SoC architecture, data center, debug, telemetry, RAS, manageability
Who's hiring in this category
- Qualcomm (this employer) · 80 open roles · median 82 d
- NVIDIA · 52 open roles · median 69 d
- Apple · 37 open roles · median 16 d
- AMD · 36 open roles · median 73 d
- Arm Holdings · 27 open roles · median 121 d
- Micron Technology · 21 open roles · median 100 d
How we counted: 473 open SoC/Chip Architecture (SOC Architecture) roles from 67 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.