SerDes Circuit Design Engineer - San Diego, United States
Originally posted 28 September 2026 by the employer.
About the role
This role involves the design of high-performance SerDes PHY circuits for high-performance wireline transceivers. The position focuses on developing intellectual property (IP) for Apple's system-on-chip (SOC).
What you'll do
- Develop high-performance and high-speed analog mixed-signal circuits used in SerDes PHY, evaluating topologies for specific product requirements.
- Lead discussions with cross-functional teams to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling.
- Deliver IP views to SOC teams, ensuring they meet quality standards.
- Communicate progress, discuss new ideas, and drive new implementations/concepts with peers and management.
What you'll need
- BS degree and a minimum of 10 years relevant industry experience.
- Deep understanding of analog mixed-signal design with experience in high-speed serial links.
- Experience designing analog mixed-signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
- Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques.
- Understanding and experience with digitally assisted analog design concepts (e.g., background calibrations, LMS based adaptive loops).
- Proven track record of working with system and architecture teams to drive block-level and IP requirements for high-speed IO in 100+ Gbps NRZ and PAM applications.
- Proven track record of working with large teams and guiding junior engineers to develop circuit components required in TX, RX, PLL etc. of a high-speed IO.
- Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts.
- Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g., CTLE, DFE, de-emphasis) for 100+ Gbps NRZ and PAM applications.
- Experience with EQ adaptation methods and circuit implementations to improve PPA.
- Solid understanding of CDR architectures and implementations.
- Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g., SystemVerilog, Matlab, Python, VerilogAMS).
- Hands-on experience to drive lab testing, debug, and data analysis.
- Hands-on experience in advanced CMOS technologies, design with FinFet technology.
- Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.
- Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime).
- Concepts of IP delivery and quality checks.
Nice to have
- Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired.
- Skills in scripting and automation to enhance efficiency are highly desirable.
Skills: SerDes, high-speed serial links, Rx, CDR, Tx, analog mixed-signal design, 100+ Gbps NRZ and PAM
This role has been open 11 days — well below the 77-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
242
|
Median days open
77 d
|
Median salary
$177k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (242 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 12 | 242 |
| Open roles in the wider Analog & Mixed-Signal family | 38 | 1413 · 106 employers |
| Median days open | 11 d | 77 d (−66 d vs this employer) |
| Median salary (USD postings) | — | $177k |
Skills observed across this category: SerDes, high-speed serial links, Rx, CDR, Tx, analog mixed-signal design, 100+ Gbps NRZ and PAM
Who's hiring in this category
- AMD · 30 open roles · median 37 d
- Synopsys · 29 open roles · median 25 d
- Cadence Design Systems · 19 open roles · median 183 d
- Qualcomm · 19 open roles · median 58 d
- Micron Technology · 13 open roles · median 70 d
- Apple (this employer) · 12 open roles · median 11 d
How we counted: 242 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 48 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.