Layout Designer | PMIC - Dallas, TX, United States
Originally posted 24 September 2026 by the employer.
Contribute to the development of power management ICs for high power density applications.
About the role
This role is for an experienced Layout Designer contributing to the development of power management ICs for high power density applications.
What you'll do
- Execute hands-on layout for power management ICs.
- Collaborate with circuit designers and the design team on layouts.
- Contribute to the adoption of new tools and flows.
- Help push the boundaries of thermal and electrical performance in power solutions.
What you'll need
- Minimum education: Associate degree.
- Minimum of 5 years of experience.
- Deep understanding of analog and power layout techniques, including matching, symmetry, current density, electromigration, and IR drop management.
- Experience with high-voltage design rules, isolation techniques, and device spacing for BCD/HV processes.
- Strong knowledge of parasitic-aware layout for sensitive analog blocks such as bandgaps, references, comparators, and op-amps.
- Familiarity with power device layout, including LDMOS, power MOSFETs, bond pads, and ESD structures.
- Proficiency with layout tools such as Cadence Virtuoso and verification flows including DRC, LVS, PEX, and parasitic extraction.
Skills: analog layout, power layout, Cadence Virtuoso, DRC/LVS/PEX, PMIC, high-voltage design
This role has been open 16 days — well below the 67-day median for Analog IC Design roles.
Analog IC Design · Power Management
|
Open roles in category
87
|
Median days open
67 d
|
Median salary
$196k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Texas Instruments | All employers we track in this specialty (87 roles · 12 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 87 |
| Open roles in the wider Analog & Mixed-Signal family | 65 | 1413 · 106 employers |
| Median days open | 65 d | 67 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $196k |
Skills observed across this category: analog layout, power layout, Cadence Virtuoso, DRC/LVS/PEX, PMIC, high-voltage design
Who's hiring in this category
- onsemi · 20 open roles · median 51 d
- Renesas Electronics · 20 open roles · median 89 d
- QORVO · 9 open roles · median 40 d
- Texas Instruments (this employer) · 9 open roles · median 64 d
- Monolithic Power Systems · 8 open roles · median 204 d
- Analog Devices · 6 open roles · median 135 d
How we counted: 87 open Analog IC Design (Power Management) roles from 12 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.