Senior System Level Testability Engineer - CA, Santa Clara, United States
$168,000 - $310,500 USD yearly
Originally posted 10 September 2026 by the employer.
About the role
This Senior System Level Testability Engineer role involves defining and driving system-level diagnostics, verification, and post-silicon validation for complex semiconductor chips. You will contribute to production workflows and products cross-functionally.
What you'll do
- Partner with engineering teams to determine coverage needs and constraints for production line screens.
- Define requirements for software and board teams to support and improve test infrastructure.
- Co-design testability scope and coverage enhancements for manufacturing testing with a focus on system-level test.
- Prototype and fine-tune speed, power, performance, yield, and quality on pre-production silicon.
- Co-design, develop, and maintain system-level testing flows and incorporate silicon takeaways.
- Support customer-facing and quality teams during customer escalations to address issues and fix coverage gaps.
What you'll need
- Bachelor's or Master's Degree in Microelectronics/Electrical/Electronic/Computer Engineering or equivalent experience.
- 8+ years of relevant industry experience.
- Strong EE fundamentals, knowledgeable in digital design, signal integrity, statistics, timing analysis, fault analysis, sampling, and computer architecture.
- Strong data analysis skills.
- Hands-on lab experience with silicon bring-up and lab debug.
- Understanding of firmware/driver structures and their interaction with hardware.
- Experience with Python, BASH, Linux.
Nice to have
- Experience working with volume data.
- Co-designed or led multi-functional alignment on production methodologies adopted by other teams in an HVM environment.
Skills: post-silicon bring-up, system-level test, debug, silicon characterization, fault analysis
This role has been open 34 days — below the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
412
|
Median days open
41 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (412 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 25 | 412 |
| Open roles in the wider Silicon Validation & Test family | 95 | 2224 · 112 employers |
| Median days open | 22 d | 41 d (−19 d vs this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: post-silicon bring-up, system-level test, debug, silicon characterization, fault analysis
Who's hiring in this category
- AMD · 58 open roles · median 41 d
- Micron Technology · 39 open roles · median 37 d
- Qualcomm · 37 open roles · median 27 d
- NVIDIA (this employer) · 25 open roles · median 22 d
- Graphcore · 21 open roles · median 120 d
- Microchip Technology · 20 open roles · median 70 d
How we counted: 412 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.