Senior Staff, Systems Design Engineering - Hsinchu, Taiwan
Originally posted 28 August 2026 by the employer.
This role focuses on the lifecycle management of DRAM components in Sandisk SSD products.
About the role
This role serves as a technical and strategic interface between DRAM suppliers and the global SanDisk Systems Design Team to ensure successful adoption, qualification, and lifecycle management of DRAM components in SanDisk SSD products. You will provide guidance on product validation to improve DRAM quality and participate in hands-on debug of DRAM and system-level failure analysis.
What you'll do
- Serve as the primary technical interface for key DRAM suppliers, providing expert guidance on DRAM products testing, validation, and issue resolution.
- Monitor and analyze results of Ongoing Reliability Testing on SSD drives.
- Perform deep-dive hands-on failure analysis with a focus on DRAM and document corrective actions.
- Collaborate with the global SanDisk Systems Design Team and Supplier Quality Engineer (SQE) Team to ensure DRAM components perform to expectations.
- Participate in DRAM supplier audits and maintain relationships with suppliers through technical and program reviews.
- Leverage automation, scripting, and AI-assisted tools to improve debug efficiency, analysis quality, and engineering productivity.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or 12+ years of equivalent practical experience.
- Hands-on experience with DRAM product and quality management, reliability, and failure analysis.
- Strong understanding of memory technologies, system architecture, or platform validation.
- Strong knowledge of DDR5 interface architecture, protocols, training, validation, and debug.
- Strong knowledge of DDR controller architecture, operation, configuration, performance tuning, and failure analysis.
- Strong understanding of HW–FW–system interactions, with the ability to debug complex issues spanning multiple layers.
- Experience with lab debug, including collaborating with cross-functional teams to drive systematic problem solving and root-cause analysis.
- Demonstrated ability to lead technical direction and influence decisions without formal people management responsibility.
Nice to have
- Fluent bilingual communication in English and Mandarin.
Skills: DRAM products testing, DDR5 interface architecture, DDR controller architecture, memory technologies, failure analysis
This role has been open 38 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SanDisk | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 17 | 287 |
| Median days open | 32 d | 69 d (−37 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: DRAM products testing, DDR5 interface architecture, DDR controller architecture, memory technologies, failure analysis
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk (this employer) · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.