Senior Staff Semiconductor Test Engineer PMIC - Chandler, United States
Originally posted 4 September 2026 by the employer. Relisted by the employer on 21 September 2026.
This position will work on analog power management IC (PMIC) testing.
About the role
As a Senior Staff Test Engineer, you will be responsible for applying expertise in test discipline, leading and contributing to the development of company objectives to achieve goals. This position focuses on analog power management IC (PMIC) testing.
What you'll do
- Lead and contribute to the development of company objectives.
- Exercise independent judgment in methods, techniques, and evaluation criteria for obtaining results.
- Create formal networks involving coordination among groups.
- Provide technical support to peers.
- Work with the team/leadership to set schedules and meet commitments.
- Identify and close enablement or readiness gaps.
What you'll need
- Bachelor’s degree or higher in Electrical or Computer Engineering, or Computer Science.
- 7 to 12+ years of experience working with Automated Test Systems (ATE).
- 5 to 12+ years of hands-on experience in ATE test development for analog, digital, and mixed signal, with a strong focus on analog power management IC (PMIC) testing.
- Experience in programming such as C++, basic, Perl, python.
- Experience in testing and collecting data on IC chips or circuits using standard tools such as Oscilloscopes, Multimeters, Spectrum Analyzers.
- Proficient with ATE analog digital instruments, PCB layout parasitic reduction, and strong debug/troubleshooting experience.
- Hands-on experience in debugging analog products with serial bus interfaces.
- Experience with test hardware and test program development.
This role has been open 40 days — well above the 28-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
542
|
Median days open
28 d
|
Median salary
$172k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (542 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 44 | 542 |
| Open roles in the wider Silicon Validation & Test family | 119 | 2220 · 112 employers |
| Median days open | 22 d | 28 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $172k |
Who's hiring in this category
- Teradyne · 72 open roles · median 27 d
- Renesas Electronics (this employer) · 45 open roles · median 22 d
- Infineon Technologies · 41 open roles · median 37 d
- Micron Technology · 27 open roles · median 35 d
- Qualcomm · 27 open roles · median 27 d
- AMD · 25 open roles · median 42 d
How we counted: 542 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.