Senior Staff Post Silicon Validation Engineer - Global Operations - Austin, Texas, United States
Originally posted 30 January 2026 by the employer.
About the role
As a Senior Staff Validation Engineer, you will validate mixed-signal processing, battery charging, and power management ICs to ensure performance and efficiency specifications.
What you'll do
- Develop comprehensive validation plans for IP and chip-level test cases based on datasheets, collaborating with design and systems engineers. - Participate in design and architecture reviews, recommending Design-for-Validation (DFV) hooks to maximize coverage. - Design FPGA emulation and silicon validation boards, and review layouts before fabrication. - Build automation frameworks and scripts in Python, C, or similar languages to streamline validation and regression testing. - Execute pre- and post-silicon tests on lab benches, expanding coverage across multiple products and firmware releases. - Analyze test results using tools such as Spotfire or JMP and assist in debugging ATE test issues.
What you'll need
- BS in Electrical or Computer Engineering with 10+ years of experience, or MS with 7+ years of experience. - Experience in FPGA-based emulation, pre/post-silicon validation, and mixed-signal IP design/validation. - Proficiency with automation and scripting in Python, C, or similar. - Hands-on experience with lab equipment including oscilloscopes, signal generators, and analyzers. - Knowledge of analog/digital design, power electronics, and mixed-signal building blocks including ADCs, DACs, PLLs, amplifiers, LDOs, and SMPSs.
Nice to have
- Experience with automation frameworks and hardware tools such as FPGA, DSP, and NI Data Acquisition. - Familiarity with industry interface standards including I2C, SPI, USB, I2S, and TDM. - High-power validation experience with SMPS testing. - PCB design and layout expertise with signal integrity and thermal considerations. - Grasp of mixed-signal test theory including Nyquist theorem, oversampling, and aliasing.
Skills: FPGA emulation, pre-silicon validation, post-silicon validation, mixed-signal IP, lab equipment, automation frameworks
This role has been open 220 days — well above the 115-day median for Silicon Test Engineering roles.
Silicon Test Engineering · Silicon Validation
|
Open roles in category
185
|
Median days open
115 d
|
Median salary
$129k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cirrus Logic | All employers we track in this specialty (185 roles · 55 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 185 |
| Open roles in the wider Silicon Validation & Test family | 21 | 2235 · 112 employers |
| Median days open | 169 d | 115 d (+54 d vs this employer) |
| Median salary (USD postings) | — | $129k |
Skills observed across this category: FPGA emulation, pre-silicon validation, post-silicon validation, mixed-signal IP, lab equipment, automation frameworks
Who's hiring in this category
- Teradyne · 14 open roles · median 120 d
- Qualcomm · 12 open roles · median 115 d
- Renesas Electronics · 12 open roles · median 108 d
- Infineon Technologies · 9 open roles · median 123 d
- Marvell Technology · 9 open roles · median 123 d
- onsemi · 8 open roles · median 137 d
How we counted: 185 open Silicon Test Engineering (Silicon Validation) roles from 55 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.