Senior Staff Post-Silicon Automation Engineer (PAM4 DSP)
Originally posted 1 September 2026 by the employer.
About the role
This role involves post-silicon validation for high-speed connectivity products. The team validates Ethernet PAM4 DSP/PHY/device-level products, switch interoperability, and automation frameworks.
What you'll do
- Develop Python, Shell, and automation scripts for test execution, data collection, and log parsing.
- Build AI-assisted and agentic validation workflows for automated test execution, failure triage, and root-cause recommendation.
- Develop intelligent debug agents to analyze telemetry, FEC counters, firmware logs, and register dumps.
- Collaborate with firmware, design, systems, software, application, and customer engineering teams to define validation coverage.
- Develop validation plans for Ethernet PAM4 DSP, PHY, ASIC, AEC/ACC, optical, and switch-facing products.
- Execute device-level and switch-level post-silicon validation, including bring-up, interoperability, functional testing, and performance characterization.
What you'll need
- Bachelor’s degree in Computer Science, Electrical Engineering, Electronics Engineering, or related fields with 3–15 years of professional experience, or Master’s/PhD with 2–10 years of experience.
- Hands-on lab experience using oscilloscopes, BERTs, protocol analyzers, optical switches, traffic generators, or temperature chambers.
- Strong automation skills using Python, Shell, or similar scripting languages.
- Experience with C/C++ or low-level software development for hardware control, register access, or firmware interaction.
- Familiarity with Linux environments, device drivers, hardware/software interaction, and CI systems.
- Strong debugging skills for link-up issues, signal integrity problems, and firmware failures.
Nice to have
- Experience in validation, bring-up, debug, or characterization of DSPs, PHYs, SoCs, ASICs, or high-speed networking devices.
- Hands-on experience with Ethernet validation, PAM4 signaling, switch-level interoperability, or high-speed SerDes bring-up.
- Knowledge of high-speed interfaces such as Ethernet, PCIe, I2C, MDIO, or CMIS.
- Experience working with switches, optics, AEC/ACC cables, PHY/DSP devices, and system-level validation environments.
This role has been open 27 days — well below the 48-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
113
|
Median days open
48 d
|
Median salary
—
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See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (113 roles · 28 employers) |
|---|---|---|
| Open roles in this specialty | 2 | 113 |
| Open roles in the wider Silicon Validation & Test family | 44 | 2181 · 111 employers |
| Median days open | 79 d | 48 d (+31 d vs this employer) |
| Median salary (USD postings) | — | — |
Who's hiring in this category
- Qualcomm · 20 open roles · median 37 d
- AMD · 15 open roles · median 46 d
- NVIDIA · 14 open roles · median 57 d
- Graphcore · 9 open roles · median 104 d
- Altera · 6 open roles · median 34 d
- Amazon · 6 open roles · median 23 d
How we counted: 113 open Post-Silicon Validation (Design Verification) roles from 28 employers tracked in the SemiconductorJobs index, counted 29 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.