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NVIDIA

Senior Silicon Power, Thermal Validation and Methodology Engineer - CA, Santa Clara, United States

NVIDIA US, CA, Santa Clara, United States 2 months ago
Digital Design & SoC Architecture

Originally posted 6 August 2026 by the employer.

This role focuses on silicon power and thermal productization methodology within the Silicon Design for Productization (DFP) Team.

About the role

This role is for a Senior Silicon Power, Thermal Validation and Methodology Engineer within the Silicon Design for Productization (DFP) Team, focusing on power and thermal design and executable productization methodology.

What you'll do

  • Lead multi-functional teams in managing the power and thermal productization strategy.
  • Create methodology and silicon test plans based on controller designs and architecture.
  • Drive resolution for silicon issues through structured hypotheses, measurement, and root-cause closure.
  • Steward the Power and Thermal playbook, creating new mitigations and reusable methods.
  • Build AI-enabled workflows to automate data analysis, metric extraction, and report generation.
  • Serve as a key technical owner for multi-functional decisions, issues, and tradeoffs related to feature bring-up.

What you'll need

  • BS or MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
  • 8+ years of experience in post-silicon bring-up and validation of power and thermal features on ASIC or SoC programs.
  • End-to-end understanding of silicon behavior across architecture, firmware, validation, and platform interactions, with expertise in power and thermal domains.
  • Evidence of creating/improving characterization docs, debug tools, dashboards, or other technical artifacts.
  • Demonstrated ability to make tradeoff decisions across power, thermal, performance, firmware, design, validation, and schedule constraints.
  • Experience building or applying AI-enabled workflows for silicon characterization or validation.
Market context

This role has been open 71 days — well above the 51-day median for Hardware Systems Engineering roles.

Hardware Systems Engineering · AI ML Hardware

Open roles in category
963
Median days open
51 d
Median salary
$156k
See the full market breakdown ▾Category comparison, and who else is hiring
How NVIDIA compares in Hardware Systems Engineering hiring
Metric NVIDIA All employers we track in this specialty (963 roles · 102 employers)
Open roles in this specialty 51 963
Open roles in the wider Software, Firmware & Systems family 973 6114 · 145 employers
Median days open 67 d 51 d (+16 d vs this employer)
Median salary (USD postings) — $156k

Who's hiring in this category

  • Intel Corporation · 73 open roles · median 36 d
  • KLA Corporation · 65 open roles · median 44 d
  • Teradyne · 57 open roles · median 30 d
  • NVIDIA (this employer) · 51 open roles · median 68 d
  • Applied Materials · 50 open roles · median 66 d
  • AMD · 47 open roles · median 50 d

How we counted: 963 open Hardware Systems Engineering (AI ML Hardware) roles from 102 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.

Apply now
US, CA, Santa Clara, United States
On-site
2 months ago

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