Senior SerDes & High-Speed PHY Validation Engineer
Verification, Validation & Test
Lead validation and characterization for 112G PAM4 and 224G Ethernet PHY architectures.
About the role
Xsight Labs is seeking a Senior SerDes & High-Speed PHY Validation Engineer to lead the validation and characterization of advanced Ethernet SerDes technologies across silicon, package, board, and system environments. The role focuses on 112G PAM4 and 224G PHY architectures for cloud, AI, and data center networking systems.
What you'll do
- Define and execute validation strategies and characterization methodologies for 112G PAM4 and 224G Ethernet SerDes technologies across operating conditions.
- Support silicon bring-up and perform root-cause analysis of complex system-level performance issues across silicon, package, PCB channels, connectors, and cables.
- Execute high-speed measurements including eye diagrams, BER and margin analysis, bathtub curves, jitter decomposition (RJ, DJ, TJ), CTLE/DFE evaluation, and TX FIR optimization.
- Configure and operate lab instrumentation including Keysight BERTs, high-speed oscilloscopes, channel emulators, and vector network analyzers (VNAs).
- Contribute to test automation frameworks using Python to improve test efficiency, data collection, analysis, and reporting.
- Execute compliance and interoperability testing against industry standards, including IEEE 802.3cd, 802.3ck, and IEEE P802.3dj Ethernet specifications.
What you'll need
- 5+ years of experience in SerDes validation, PHY validation, signal integrity, or related high-speed design environments.
- Hands-on experience validating high-speed PAM4-based communication systems.
- Strong technical grounding in PAM4 signaling, BER measurements, margining techniques, jitter decomposition, equalization (CTLE, DFE, FFE), and channel loss fundamentals.
- Practical experience operating high-speed laboratory test equipment such as oscilloscopes, BERTs, and VNAs.
- B.Sc. or M.Sc. in Electrical Engineering or a related technical discipline.
Nice to have
- Experience validating 112G Ethernet SerDes or 224G SerDes technologies.
- Hands-on experience with first-silicon bring-up and characterization.
- Experience with Ethernet compliance and interoperability testing per relevant IEEE standards.
- Experience with Keysight validation platforms, automation APIs, and SQL-based data analysis.
- Automation and scripting skills using Python in Linux environments.
Skills: SerDes, PAM4, 112G, BERT, signal integrity
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