$129,400 USD yearly
About the role
Broadcom's ASIC Product Division is seeking a DFT Team Manager to lead the local DFT team from chip-level DFT specification through implementation, verification, and production release. The role oversees SoC DFT activities including architecture, test insertion, pattern generation, coverage improvement, and post-silicon debug.
What you'll do
- Define DFT specifications based on ASIC feature requirements and DPPM goals.
- Lead the team in implementing Scan, MBIST, TAP, LBIST, IO, and SerDes IP DFT integration.
- Collaborate with STA and physical design engineers on DFT mode timing and design closure.
- Project manage assigned DFT resources and handle line management responsibilities, including performance reviews and coaching.
- Drive silicon failure analysis, diagnostics, and yield improvement efforts with test engineering and manufacturing teams.
- Interface with customers and internal executive management while providing hands-on technical support to assigned DFT leads.
What you'll need
- Bachelor's degree in Electrical, Electronic, or Computer Engineering with 12+ years of relevant industry experience, including a minimum of 3 years in management.
- Experience with scan insertion and scan compression tools such as DFT Compiler and Mentor TestKompress.
- Experience in ATPG vector generation, simulation, and debugging using tools such as TetraMax or Fastscan.
- Hands-on experience with Verilog coding, testbench generation, simulation, and Test-STA constraints.
- Background in Memory BIST insertion and verification on embedded SRAM, CAM, eDRAM, or ROM.
- Knowledge of boundary scan verification (IEEE 1149.1 and IEEE 1149.6) and IJTAG standards (IEEE 1687, ICL, PDL).
Nice to have
- Experience working on Tessent SSN.
More semiconductor jobs: Broadcom jobs · DFT engineer jobs
First seen in our index 0 days ago, well below the 55-day median for DFT Engineering roles.
DFT Engineering · DFT Test
|
Open roles in category
301
|
Median days since first seen
55 d
|
Category median salary (all employers)
$206k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Broadcom | All employers we track in this specialty (301 roles · 55 employers) |
|---|---|---|
| Open roles in this specialty | 30 | 301 |
| Open roles in the wider Digital Design & Verification family | 78 | 3533 · 119 employers |
| Median days since first seen | 8 d | 55 d (+47 d vs this employer) |
| Median salary (USD postings) | n/a | $206k |
Who's hiring in this category
- AMD · 43 open roles · median 49 d
- Broadcom (this employer) · 29 open roles · median 8 d
- NVIDIA · 24 open roles · median 51 d
- Qualcomm · 24 open roles · median 81 d
- NXP Semiconductors · 19 open roles · median 65 d
- Synopsys · 19 open roles · median 35 d
How we counted: 301 open DFT Engineering (DFT Test) roles from 55 employers tracked in the SemiconductorJobs index, counted 11 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.