Senior RISC-V Digital IP Design Engineer - Brno, South Moravia, Czech Republic
Originally posted 17 September 2026 by the employer — open 0 days.
Join onsemi’s RISC-V division to define and implement configurable and customizable RISC-V CPU IP.
About the role
This role involves participating in the CPU design lifecycle, from requirements and architectural exploration through microarchitecture definition, implementation, and verification support. You will focus on RISC-V CPU IP, using CodAL for implementation and RTL generation.
What you'll do
- Define and implement RISC-V CPU microarchitecture in CodAL.
- Develop configurable processor capabilities, custom instructions, and architecture enhancements.
- Translate architecture, product, safety, and security requirements into implementable microarchitecture and design rationale.
- Design CPU features related to privilege modes, exceptions, interrupts, memory interfaces, and debug functionality.
- Analyze timing, area, power, performance, and code-efficiency metrics to guide implementation and optimization decisions.
- Collaborate with compiler, SDK, and firmware engineers to ensure effective hardware feature usage by software.
What you'll need
- Strong experience in CPU, SoC, DSP, accelerator, or complex reusable digital IP design.
- Advanced knowledge of Verilog/SystemVerilog, RTL design, and digital design fundamentals.
- Good understanding of processor microarchitecture concepts such as pipelines, privilege levels, exceptions, interrupts, memory access and debugger capability.
- Experience with microarchitecture definition, implementation trade-offs, design reviews, and design-for-verification practices.
- Ability to translate technical requirements into implementable design features, constraints, and design evidence.
- Ability to evaluate trade-offs between performance, power, area, timing, software impact, and verification complexity.
Skills: RISC-V CPU microarchitecture, CodAL, RTL design, Verilog/SystemVerilog, processor pipelines
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
921
|
Median days open
62 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (921 roles · 101 employers) |
|---|---|---|
| Open roles in this specialty | 31 | 921 |
| Open roles in the wider Digital Design & Verification family | 55 | 2998 · 116 employers |
| Median days open | 90 d | 62 d (+28 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: RISC-V CPU microarchitecture, CodAL, RTL design, Verilog/SystemVerilog, processor pipelines
Who's hiring in this category
- Qualcomm · 134 open roles · median 58 d
- AMD · 60 open roles · median 67 d
- Synopsys · 56 open roles · median 31 d
- NXP Semiconductors · 53 open roles · median 64 d
- NVIDIA · 49 open roles · median 50 d
- Analog Devices · 38 open roles · median 75 d
How we counted: 921 open Digital/RTL Design (RTL Design) roles from 101 employers tracked in the SemiconductorJobs index, counted 17 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.