Senior Product Manager, Hardware (NPU IP) - Burlingame, California, United States
$200,000 - $250,000 USD yearly
Originally posted 15 May 2026 by the employer.
Own the Chimera GPNPU IP roadmap and architecture freeze decisions for customer SoC silicon.
About the role
Quadric is seeking a Senior Product Manager, Hardware to own the Chimera GPNPU IP roadmap across Compute, Efficiency, Scalability, Safety, and Integration tracks. This role drives architecture freeze decisions for the general purpose neural processing unit architecture and interfaces directly with anchor customer SoC teams.
What you'll do
- Translate customer requirements, competitive dynamics, and architectural constraints into a track-by-track hardware roadmap with explicit gating decisions. - Drive contested architecture freeze decisions by analyzing architectural tradeoffs with engineering and presenting recommendations to the PSC. - Serve as named hardware product owner for anchor accounts, presenting features, evaluating architecture feedback, and identifying customer integration workarounds. - Track competitive hardware architectures including Synopsys NPX6, Arm Ethos-U85, Ceva NeuPro-M, VeriSilicon Vivante, and NVIDIA Jetson to derive product requirements. - Position SoC integration features including AXI4/ACE-Lite, CoreSight, power-domain partitioning, and performance counters in integration guides. - Direct functional safety positioning by sequencing FMEDA work, lockstep configurations, and safety-island architecture.
What you'll need
- 5–8 years of product management experience on hardware or silicon products. - Proven track record running architecture reviews with Tier 1 automotive and OEM SoC customer teams. - Direct experience with semiconductor IP licensing lifecycles and 18–24 month SoC integration timelines. - Direct experience with at least two of the following: NPU/AI accelerator architecture, SoC integration, DSP/vector compute, automotive silicon, or semiconductor IP licensing. - EE, CE, CS engineering degree or equivalent technical depth. - Daily usage of agentic AI tools (Claude Code, Cursor, or equivalent) to execute product workflows.
Nice to have
- RTL or silicon-implementation background, including shipping a block, participating in tape-out, or authoring microarchitecture specifications. - Prior IP vendor experience at companies such as Synopsys, Arm, Ceva, Cadence, Imagination, VeriSilicon, or Rambus. - Architecture-level exposure to AI/ML compute concepts including dataflow, quantization, sparsity, and mixed-precision tradeoffs. - Experience engaging Japanese-market semiconductor or automotive accounts.
Skills: hardware roadmap, architecture freeze, NPU IP, SoC integration, functional safety positioning
This role has been open 162 days — well above the 45-day median for Product Management roles.
Product Management · AI ML Hardware
|
Open roles in category
70
|
Median days open
45 d
|
Median salary
$248k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Quadric | All employers we track in this specialty (70 roles · 22 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 70 |
| Median days open | 162 d | 45 d (+117 d vs this employer) |
| Median salary (USD postings) | — | $248k |
Skills observed across this category: hardware roadmap, architecture freeze, NPU IP, SoC integration, functional safety positioning
Who's hiring in this category
- NVIDIA · 22 open roles · median 35 d
- Qualcomm · 10 open roles · median 72 d
- AMD · 8 open roles · median 57 d
- NXP Semiconductors · 4 open roles · median 23 d
- Analog Devices · 3 open roles · median 42 d
- Micron Technology · 3 open roles · median 44 d
How we counted: 70 open Product Management (AI ML Hardware) roles from 22 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.