Senior Principal Engineer - San Jose, United States
Originally posted 26 October 2026 by the employer.
About the role
This role leads the development of test vehicles supporting high-current BCD and low-voltage GaN power process and product portfolios from concept through silicon bring-up. The position owns test vehicle definition, circuit and layout design, and characterization planning in close collaboration with process development, product engineering, and applications teams.
What you'll do
- Define, design, and drive execution of test vehicles for high-current BCD and LV GaN process technologies, including device test structures, scaled power stages, and full-function demonstration circuits. - Translate process capability targets and product roadmap requirements into test vehicle architectures and specifications. - Design and simulate power stage circuits such as synchronous buck/boost, multiphase, half-bridge/DrMOS, and gate drivers under realistic switching and thermal conditions. - Perform IC-level layout and parasitic-aware design for test structures, covering switch nodes, current sensing, and gate drive paths. - Co-design power stages at the module and package level with packaging, magnetics, and PCB layout for evaluation boards and system-level test vehicles. - Develop characterization plans, lead silicon bring-up, and correlate measured results against simulation targets across DC parametrics, efficiency, switching performance, and voltage stress margins.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related field. - 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics. - Strong working knowledge of power conversion topologies, including buck, boost, multiphase/interleaved converters, half-bridge, and DrMOS architectures. - Solid understanding of power device physics and tradeoffs across BCD process technologies and GaN (specifically low-voltage GaN HEMTs), covering RDS(ON), switching loss, gate charge, and breakdown behavior. - Demonstrated experience designing test structures or test chips/vehicles for process technology development. - IC-level design and layout experience, including parasitic-sensitive layout practices for high-current switching nodes, paired with proficiency in SPICE or equivalent circuit simulation tools. - Hands-on lab experience with silicon bring-up, debug, and characterization using oscilloscopes, curve tracers, power analyzers, and thermal imaging.
Skills: BCD, GaN, synchronous buck, DrMOS, gate drivers, test vehicles
This role has been open 0 days — well below the 53-day median for Power Electronics roles.
Power Electronics · Power Conversion
|
Open roles in category
52
|
Median days open
53 d
|
Median salary
$157k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (52 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 6 | 52 |
| Open roles in the wider Analog & Mixed-Signal family | 86 | 1453 · 106 employers |
| Median days open | 26 d | 53 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $157k |
Skills observed across this category: BCD, GaN, synchronous buck, DrMOS, gate drivers, test vehicles
Who's hiring in this category
- Infineon Technologies · 12 open roles · median 30 d
- Power Integrations · 5 open roles · median 52 d
- Renesas Electronics (this employer) · 5 open roles · median 46 d
- onsemi · 4 open roles · median 107 d
- NVIDIA · 3 open roles · median 42 d
- Eridu AI · 2 open roles · median 49 d
How we counted: 52 open Power Electronics (Power Conversion) roles from 23 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.